Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Help me find the biggest value and its position with this Verilog code

Status
Not open for further replies.

Sreya39

Junior Member level 2
Joined
Aug 30, 2007
Messages
24
Helped
4
Reputation
8
Reaction score
3
Trophy points
1,283
Location
India
Activity points
1,516
Verilog coding query

Hi frenz,
i am facing trouble in findinding the biggest number and its position in verilog ....
i am attaching the code with this... any help plzzzzz


module sambig(clock,Enable, corrouti1,corrouti2,corrouti3,corrouti4,corrouti5,dataout) ;
input clock;
input Enable;
input [9:0]corrouti1,corrouti2,corrouti3,corrouti4,corrouti5;
output [9:0] dataout ;
reg [9:0] r1[1:5];
integer i,ADDR,temp=1;
always @(posedge clock) begin
if (Enable) begin
r1[1]= corrouti1;
r1[2]= corrouti2;
r1[3]= corrouti3;
r1[4]= corrouti4;
r1[5]= corrouti5;
end
for (i = 1; i < 4; i=i+1) begin
if (r1 < r1[i+1] )
assign ADDR = i+1;
else
assign ADDR = i;
if (r1[temp]< r1[ADDR])
assign temp = ADDR;
end
end
assign dataout = r1[temp];
endmodule
 

Re: Verilog coding query

This is probably one possible way of doing it. I have not compiled it, hope it does not have syntax errors and hope it works fine.

module sambig(clock,reset,Enable, corrouti1,corrouti2,corrouti3,corrouti4,corrouti5,max_value,max_pos) ;
input clock;
input reset;
input Enable;
input [9] corrouti1,corrouti2,corrouti3,corrouti4,corrouti5;
output [9] max_value ;
output [2] max_pos;


wire [9] temp0, temp1, temp2, max_val_tmp, n_max_value;
wire [2] pos0, pos1, pos2, max_pos_tmp, n_max_pos;
reg [9] max_value;
reg [2] max_pos;

//Maximum value
assign temp0 = (corrouti1 > coorouti2) ? corrouti1 : corrouti2;
assign temp1 = (temp0 > corrouti3) ? temp0 : corrouti3;
assign temp2 = (temp1 > corrouti4) ? temp1 : corrouti4;
assign max_val_tmp = (temp2 > corrouti5) ? temp2 : corrouti5;

//Maximum position
assign pos0 = (corrouti1 > coorouti2) ? 3'd1 : 3'd2;
assign pos1 = (temp0 > corrouti3) ? pos0 : 3'd3;
assign pos2 = (temp1 > corrouti4) ? pos1 : 3'd4;
assign max_pos_tmp = (temp2 > corrouti5) ? pos2 : 3'd5;

//Assign new value when Enable is high, else hold previous value
assign n_max_value = (Enable) ? max_val_tmp ? max_value;

assign n_max_pos = (Enable) ? max_pos_tmp ? max_pos;

always@(posedge clock or negedge reset) begin
if(!reset) begin
max_value <= 10'd0;
max_pos <= 3'd0;
end
else begin
max_value <= n_max_value;
max_pos <= n_max_pos;
end
end

endmodule

Added after 1 minutes:

This is probably one possible way of doing it. I have not compiled it, hope it does not have syntax errors and hope it works fine.

module sambig(clock,reset,Enable, corrouti1,corrouti2,corrouti3,corrouti4,corrouti5,max_value,max_pos) ;
input clock;
input reset;
input Enable;
input [9:0] corrouti1,corrouti2,corrouti3,corrouti4,corrouti5;
output [9:0] max_value ;
output [2:0] max_pos;


wire [9:0] temp0, temp1, temp2, max_val_tmp, n_max_value;
wire [2:0] pos0, pos1, pos2, max_pos_tmp, n_max_pos;
reg [9:0] max_value;
reg [2:0] max_pos;

//Maximum value
assign temp0 = (corrouti1 > coorouti2) ? corrouti1 : corrouti2;
assign temp1 = (temp0 > corrouti3) ? temp0 : corrouti3;
assign temp2 = (temp1 > corrouti4) ? temp1 : corrouti4;
assign max_val_tmp = (temp2 > corrouti5) ? temp2 : corrouti5;

//Maximum position
assign pos0 = (corrouti1 > coorouti2) ? 3'd1 : 3'd2;
assign pos1 = (temp0 > corrouti3) ? pos0 : 3'd3;
assign pos2 = (temp1 > corrouti4) ? pos1 : 3'd4;
assign max_pos_tmp = (temp2 > corrouti5) ? pos2 : 3'd5;

//Assign new value when Enable is high, else hold previous value
assign n_max_value = (Enable) ? max_val_tmp ? max_value;

assign n_max_pos = (Enable) ? max_pos_tmp ? max_pos;

always@(posedge clock or negedge reset) begin
if(!reset) begin
max_value <= 10'd0;
max_pos <= 3'd0;
end
else begin
max_value <= n_max_value;
max_pos <= n_max_pos;
end
end

endmodule
 

    Sreya39

    Points: 2
    Helpful Answer Positive Rating
Re: Verilog coding query

Did you consider something like:

reg [9:0] max;
...
max<= (c1>c2&&c1>c3&&c1>c4&&c1>c5)?c1
:(c2>c3&&c2>c4&&c2>c5)?c2
:(c3>c4&&c3>c5)?c3
:c4>c5?c4
:c5;

Might be a lot to get done in one clock. What is you clk freq and hardware?
 

    Sreya39

    Points: 2
    Helpful Answer Positive Rating
Re: Verilog coding query

Thanks....Now i am able to find the biggest value and its location among 20 values but the problem is i have to find the first location of the maximum value if the maximum value occur more than once..
i have attached the code with this..... can u help me......

module biggg(clock,Enable,reset,corrouti1,corrouti2,corrouti3,corrouti4,corrouti5,corrouti6,corrouti7,
corrouti8,corrouti9,corrouti10,corrouti11,corrouti12,corrouti13,corrouti14,corrouti15,
corrouti16,corrouti17,corrouti18,corrouti19,corrouti20,max_value, max_pos) ;
input clock;
input reset;
input Enable;
input [9:0] corrouti1,corrouti2,corrouti3,corrouti4,corrouti5,corrouti6,corrouti7,
corrouti8,corrouti9,corrouti10,corrouti11,corrouti12,corrouti13,corrouti14,corrouti15
output [9:0] max_value ;
output [4:0] max_pos;


wire [9:0] temp0,temp1,temp2,temp3,temp4,temp5,temp6,temp7,temp8,temp9,temp10, temp11,
temp12,temp13,temp14,temp15,temp16,temp17,temp18, max_val_temp, n_max_value;
wire [4:0] pos0, pos1, pos2,pos3,pos4,pos5,pos6,pos7,pos8,pos9,pos10,pos11, pos12,pos13,
pos14,pos15,pos16,pos17,pos18, max_pos_temp, n_max_pos;
reg [9:0] max_value;
reg [4:0] max_pos;

//Maximum value
assign temp0 = (corrouti1 > corrouti2) ? corrouti1 : corrouti2;
assign temp1 = (temp0 > corrouti3) ? temp0 : corrouti3;
assign temp2 = (temp1 > corrouti4) ? temp1 : corrouti4;
assign temp3 = (temp2 > corrouti5) ? temp2 : corrouti5;
assign temp4 = (temp3 > corrouti6) ? temp3 : corrouti6;
assign temp5 = (temp4 > corrouti7) ? temp4 : corrouti7;
assign temp6 = (temp5 > corrouti8) ? temp5 : corrouti8;
assign temp7 = (temp6 > corrouti9) ? temp6 : corrouti9;
assign temp8 = (temp7 > corrouti10) ? temp7 : corrouti10;
assign temp9 = (temp8 > corrouti11) ? temp8 : corrouti11;
assign temp10 = (temp9 > corrouti12) ? temp9 : corrouti12;
assign temp11 = (temp10 > corrouti13) ? temp10 : corrouti13;
assign temp12 = (temp11 > corrouti14) ? temp11 : corrouti14;
assign temp13 = (temp12 > corrouti15) ? temp11 : corrouti15;
assign temp14 = (temp13 > corrouti16) ? temp13 : corrouti16;
assign temp15 = (temp14 > corrouti17) ? temp14 : corrouti17;
assign temp16 = (temp15 > corrouti18) ? temp15 : corrouti18;
assign temp17 = (temp16 > corrouti19) ? temp16 : corrouti19;
assign temp18 = (temp17 > corrouti20) ? temp17 : corrouti20;
assign max_val_temp = (temp18 > corrouti20) ? temp18 : corrouti20;

//Maximum position
assign pos0 = (corrouti1 > corrouti2) ? 5'd1 : 5'd2;
assign pos1 = (temp0 > corrouti3) ? pos0 : 5'd3;
assign pos2 = (temp1 > corrouti4) ? pos1 : 5'd4;
assign pos3 = (temp2 > corrouti5) ? pos2 : 5'd5;
assign pos4 = (temp3 > corrouti6) ? pos3 : 5'd6;
assign pos5 = (temp4 > corrouti7) ? pos4 : 5'd7;
assign pos6 = (temp5 > corrouti8) ? pos5 : 5'd8;
assign pos7 = (temp6 > corrouti9) ? pos6 : 5'd9;
assign pos8 = (temp7 > corrouti10) ? pos7 : 5'd10;
assign pos9 = (temp8 > corrouti11) ? pos8 : 5'd11;
assign pos10 = (temp9 > corrouti12) ? pos9 : 5'd12;
assign pos11 = (temp10 > corrouti13) ? pos10 : 5'd13;
assign pos12 = (temp11 > corrouti14) ? pos11 : 5'd14;
assign pos13 = (temp12 > corrouti15) ? pos11 : 5'd15;
assign pos14 = (temp13 > corrouti16) ? pos13 : 5'd16;
assign pos15 = (temp14 > corrouti17) ? pos14 : 5'd17;
assign pos16 = (temp15 > corrouti18) ? pos15 : 5'd18;
assign pos17 = (temp16 > corrouti19) ? pos16 : 5'd19;
assign pos18 = (temp17 > corrouti20) ? pos17 : 5'd20;
assign max_pos_temp = (temp18 > corrouti20) ? pos18 : 5'd20;

//Assign new value when Enable is high, else hold previous value
assign n_max_value = (Enable) ? max_val_temp : max_value;

assign n_max_pos = (Enable) ? max_pos_temp : max_pos;

always@(posedge clock or negedge reset) begin
if(!reset) begin
max_value <= 10'd0;
max_pos <= 5'd0;
end
else begin
max_value <= n_max_value;
max_pos <= n_max_pos;
end
end

endmodule
 

Re: Verilog coding query

Try replacing the > in each of position finding statement with >=. For example
//Maximum position
assign pos0 = (corrouti1 > corrouti2) ? 5'd1 : 5'd2;
with
assign pos0 = (corrouti1 >= corrouti2) ? 5'd1 : 5'd2;

As mstrcosmos has rightly pointed out, it is not possible to finish such a big combinational operation in 1 clock cycle if the frequecy of the clock is high.
 

    Sreya39

    Points: 2
    Helpful Answer Positive Rating
Re: Verilog coding query

I have an idea. I guess you two variable. then you should caompare it. comparing two number in verilog is so easy. then you choose one of them (with a max), probably greater one (it depend on you). if you need its positions you should keep the result of comparision in a bit because it would show which number is bigger. if you have four varibles you should do this chain double for every pair and then you would get a pair and then you should do it again for result pairs. it's like a max chain. It's so easy if you cant do it let me know i will help you!
 

    Sreya39

    Points: 2
    Helpful Answer Positive Rating
Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top