Gate drive transformer problem..FETs getting killed.

Hello,
The attached hi side FET driver circuit is blowing the FET up repeatedly in the lab. The circuit is for a hi side FET of a Buck converter, but the FETs are blowing up even when the FET is pulsed without there being any input voltage to the buck converter.

The attached Ltspice simulation shows no problem whatsoever with this circuit, even when the duty cycle suddenly jumps from zero to 80%.

Do you know what’s wrong?

When you replace the dummy FET with a more realistic SiC gate capacitance, you get Vgs oscillations up to 22V in the simulation. Can be possibly more with slightly different transformer parameters and thus exceeding Vgs maximum ratings. I would supplement an appropriate voltage limiter circuit.

I'm only discussing the stated case of MOSFET damage without load voltage. There may be other damage scenarios with applied load voltage & current.

Thanks,
The thing is, the “Ciss” of the C2M0080120D FET is 950pF (Ciss = Cgs+Cgd).
I ran the simulation with a 950pF capacitor instead and yes I can see its ringing too high at the gate....I will investigate, Thankyou FvM

C2M0080120D SiC FET datasheet
**broken link removed**

I have been passed this circuit by other engineers who have now left....they told me that the 18v zener that they had on the gate had to be removed as it was repeatedly dying.

- - - Updated - - -

Why is circuit A gate drive circuit better than circuit B? (attached, schem and LTspice sim). -They both have the same series resistance, but circuit A is better...it suffers much
less amplitude of ringing at the FET gate, and manages to
always switch the FET gate to zero volts when OFF, whereas
circuit B, for a time (at 480us), does not manage to switch the FET
gate OFF to zero volts.

Why is A so much better than B?, -they have the same series resistance

treez said:

Why is A so much better than B?, -they have the same series resistance

Click to expand...

Looking for a difference between the two... I see version A has resistor R16 (at the secondary). This causes greater damping. It has an effect on what happens in the primary.

Another difference... A has a smaller value for R2. Not sure how much advantage that gives.

Another difference... A has a smaller value for R2. Not sure how much advantage that gives.

Click to expand...

Thanks, though each circuit (A & B) has the same overall series resistance.

- - - Updated - - -

Looking for a difference between the two... I see version A has resistor R16 (at the secondary). This causes greater damping. It has an effect on what happens in the primary.

Click to expand...

I think this is very true, and I believe we can now say that circuit B is categorically incorrect –fundamentally flawed…the bulk of the damping resistance should be in the secondary coil loop (as it is in circuit A).

Any damping resistance close to the fet will be only for damping the stray circuit inductance, which is small, so just needs a small damping resistor, we can thus categorically state that circuit B is poor. Do you agree?

L2-C8 (version B) have a strong tendency to resonate. More so because no resistor is in the loop. If they cannot resonate, then they are liable to generate a spike instead. This can be transferred to the primary winding.

Perhaps their resonant action is inhibited by diodes or the other sections of the output stage. Nevertheless L2-C8 might generate one or more spikes.

Version A has R16 (30 ohms) in series with the L8-C3 loop. That ohmic resistance could be sufficient to damp spikes and resonant action.

your transformer has lost its isolation property because primary & secondary share same ground. this might not be a big deal, but i see you go out of your way for the transformer so i point this out.

your transformer has lost its isolation property because primary & secondary share same ground. this might not be a big deal, but i see you go out of your way for the transformer so i point this out.

Click to expand...

Thanks, though this is just for to get the simulator working

I gather you aren't monitoring current peak in each pulse.
A 1-shot timer IC can give accurate indication. You can also monitor case temp of MOSFET to prevent premature failure to disable gate drive.
Why 170'C

thanks, 170c because its down hole electronics

Downhole electronics these days might need to operate up to 200'C in some cases.

Special packaging is a must. Usually glass/ceramic edge sealed./
https://www.analog.com/en/applications/markets/instrumentation-and-measurement/high-temperature.html