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Re: Guardrings
it depends on the space available to you. generally, the more guardring you have, the better it is shielded from noise. if matching is critical, place a guarding for each transistor so that the environment is the same for all
u probably can ignore this error in the subcell. it seems like you have a layout that are smaller than 100X100. the checking is based on 100x100. solve this problem only when u have a layout that are bigger than 100x100
contact redundancy
first, you need to meet the EM requirement. you need to calculate the total current going into that particular gate. then look at design rule document to find the current density of contact. If min 4 (let's say) are needed, you need 4. more = better. if only need one, it is...
Re: calibre LVS errors
looks like u r missing some CAD identification layer in resistor causing it fail to be recognized properly. You can look at the lvs.rule to see the layer needed to draw that particular resistor
there isn't any function that will create via base on overlapped section in skill code. u probably have to find the intersection by AND'ing the layer and calculate the bbox and then drop the via using dbcreateRect.
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