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Recent content by wereiyou

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    SATA Specification Needed

    download sata specification is it free to download?
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    How to calculate the draft power consumption of the board?

    Hi, I have a question about how to calculate the draft power consumption of the board? Should I calculate the power consumption of each power rail?
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    Help to explain reflected-wave signaling driver

    thanks for your hlep. It's about signaling driver in PCI
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    Help to explain reflected-wave signaling driver

    Who can help to explain reflected-wave signaling driver?:idea:
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    Question about reading standard paper

    I am an elementary EE. When I am reading a standard paper, which section should I pay more attention to? I am now reading to standard of PCI Express, it's so dull and I can't get the key point. Sometimes I even wanted to give up.
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    cyclone TI DSP emulator(questions about driver)

    Reply to myself. I have change the description and it seems to be esay to understand.
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    cyclone TI DSP emulator(questions about driver)

    cyclone emulator Here is a block schematic of a TI USB2.0 DSP emulator. Because we don't need CPLD in this design, so the only important thing is to get the right VIP/PID(Perhaps I have got one) to store in the eeprom. And the only question left is that do you think that I can use any company's...
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    questions about buffer selecting

    In which condition should I use a buffer for the signal, such as a clock buffer. Can anybody give me some draft ideas?
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    Do an open-drain or open-collector output pins can supply V without external pullup?

    Does an open-drain or open-collector ouput pin can supply Vol if external pullup is not added? ---- have got the answer One more new question: Do I need to add two pullups to both side of the buffer if I connected a open-drain or open-collector signal to that buffer?
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    Question about Pullup/Pulldowns

    Why? It seems that the divided voltage is very close to the level of the ground or 2.5V power supply. So I think they can connect this net directly to the ground or the power beacuse there is no difference between these two kinds of connection. Hope for further discussion.:?:
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    Question about Pullup/Pulldowns

    Kral: Could you explain the sentence "Possibly to prevent static charge build-up between the output and gnd, when the chip is not installed. " in detail. I can't catch your meaning. The pulldown is 1M ohm:|
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    Question about Pullup/Pulldowns

    Part of schematic is shown bleow. The net STP2_VARIANT<2..0> is connected to IO pins of Altera's stratix2.
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    Question about Pullup/Pulldowns

    In some schematics, pins are both pulled up and down. For example, a pin is pulled up via a 4.7k ohm resistor to 2.5V and is also pulled down via a 1m ohm resistor to ground. Could somebody explain this? I was troubled.:cry:

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