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Recent content by tomato

  1. T

    What does TFT stand for and what it is ?

    What is TFT ? maybe u can understand..
  2. T

    What is the difference between RMS and average current?

    BASIC really?...I didnt know... sim. sftware is hspice or hsim..and i usually use awaves or sandwork waveview to see power.
  3. T

    What is the difference between RMS and average current?

    what is difference between RMS and average current? after simulating, what should i see to measure current consumption? till now, i'v checked the average current. when can i use RMS value? thanks in advance~!:D
  4. T

    problem about bandgap

    refer to u can find that. maybe i think that's right.
  5. T

    how to modify cdl file in cadence?

    i am not sure Shift + Q
  6. T

    As shown blw,can i use a differential amplifier as regulator

    hi~hr_rezaee If Vref is fixed like Bandgap ref. and then Driving Tr. in Opamp use pass tr. as PMOS. is it possible?
  7. T

    As shown blw,can i use a differential amplifier as regulator

    pls give me some comments~~ [/img] thanks....
  8. T

    magntic sensing circuit

    In case of Hall sensor, The sensitivity of sensor is better bipolar process than CMOS. maybe a cross coupled quad structure containing four Hall cells wired electrically in parallel good luck
  9. T

    can u explain about holding voltage of ESD

    thanks all.. hung_wai_ming~~..what's the Ppl?
  10. T

    can u explain about holding voltage of ESD

    hi~ I don't know why lower hold voltage is good after snapback. thanks in advance.
  11. T

    How can i make voltages?

    thanks..jr_rezaee can u explain about the buffer output? or give me a related paper?
  12. T

    How can i make voltages?

    thanks...all I have one more question For example, Vout=Vref(1+R1/R2) Vref=3.5 ,1.5V and Vout to make is 1V as shown in the 2nd circuit. Vout is always over Vref. how to make? and, If i use the 2nd circuit, what kind of type pass transistor of LDO is used as vss power? I have to use nmos pass...
  13. T

    How can i make voltages?

    One more question about LDO.. Vref terminal of the Fig. A is on '-' , and B is not. what's different? thanks..
  14. T

    How can i make voltages?

    pls refer to the attached file.. Input vef. = 3.5V Output vtg = 1V loding current of output is about 100mA.
  15. T

    How can i make voltages?

    I am sorry to confuse. I want to design on chip. If i design as Fig A and B without external, is it OK? Q1. If i use the Fig.B, what kind of type pass transistor of LDO is used as vss power? I have to use nmos for sinking current?
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