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Hello all, I wasn't sure where else to post this; I apologize if it's the incorrect forum.
We are using an FPGA to interface with an Intel 80386DX processor. All processor signals pass though the FPGA. Within the FPGA we are emulating the DMA controller (82380) using a COTS IP core we...
There are some IO that are connected to inputs on analog switches, but are not used in the CPLD program. There are a couple unused IO's that are unconnected. All unused IO's are set by default to be outputs driving to GND.
The 5V is the IO and INT voltage, only one source.
Thanks! I'll...
I've been tasked with finding out why a PCB in our lab stops working occasionally.
After talking to the techs, it seems the CPLD used (XC95144-15PQG100C) is burning up. Swapping it out fixes the board, temporarily. The bad CPLD's are checked and power and ground are shorted together...
Okay, what one must do is pull nCONFIG low, issue the FACTORY command (0x281) using Quartus .tcl scripts, and release nCONFIG. This will allow you to reprogram and use JTAG normally.
Ah, that's true. Pulling nCONFIG low is probably the easiest method?
---------- Post added at 10:31 ---------- Previous post was at 09:13 ----------
On one of my other boards, the FPGA believed that the Serial Device had valid code on it, despite it being new and presumably blank. So now I...
Well, I receive an error when I attempt to reprogram: "Error: Can't configure device. Expected JTAG ID code 0x027030DD for device 1, but found JTAG ID code 0x00000000."
Altera's Knowledge Database indicates that when a Cyclone III LS is programmed from a Serial Configuration Device, it is...
Hello, I'm using a Cyclone III LS on a board. It's programmed using the JTAG connector and a Serial Device. I need to reprogram the FPGA, but apparently the LS series has a security feature which prevents reprogramming unless a "FACTORY" command is sent via JTAG. I'm using the Altera USB...
Well, I tried, just for the heck of it, converting my .jic file to a .jam file. And it worked! I have no idea why. But I checked it by power cycling and, sure enough, the FPGA loads and the board works fine.
I have an EP2C20 Cyclone II connected to an EPCS4 Serial Loader Device. The FPGA is connected to a JTAG interface. I have been using the JTAG interface with success to program the Cyclone II. Now that I have a load that works the way I desire, I wanted to use the Serial Flash Loader...
Alright, after some experimentation, I found that several small dynamic shapes tiled together, instead of one large one, worked. Less of a fix and more of a work-around. I had to take the shape-to-shape drc to 0mils, and make sure the 'seams' didn't pass over any vias that would be connected...
Hello all. I am using Allegro PCB Editor 15.2. I had three GND planes and a power plane created with dynamic copper pours. Naturally, once I created them I turned off their visibility. At some point, when I turned them back on I noticed that the planes were making full contact with vias that...
Hello all, thanks in advance for your help!
I have a PCB I am creating that has multiple voltages, mostly 3.3V and 5V, with a few 1.22V pins.
My stackup looks like this:
Top Signal
GND
Inner 3 Signal
GND
PWR
Inner 6 Signal
GND
Bottom Signal
My thought is to have 5V occupy most of the PWR...
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