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Recent content by subbareddy434

  1. S

    ring oscillator with replica bias load

    i have designed differential ring oscillator using replica bias load my specifications are differential swing 0.4v ,ISS=200uA vdd=1.8v load resistance =2k Technology used 180nm UMC i used four stage ring vco.my problem is when sweep a control voltage i am getting linear chracterisitics in...
  2. S

    how to save operating point in rfcmos of spectre in cadence IC615

    i am using cadence IC615 . i want to know the how operating point of a mosfet can save in RF spectre
  3. S

    Cross coupled CMOS LC-VCO swing varies over frequency range

    my level shifter stage requires constant swing. actually i used current mode logic (cml) to design the divider(1/8) .So cml logic requires minimum swing of 0.4v.
  4. S

    Cross coupled CMOS LC-VCO swing varies over frequency range

    i have designed cross coupled cmos lc_vco with free running frequency of 2.7G and my bias current is 1mA.here i used to accumulation mode varactors to get tuning.after i performed pss analysis on vco it showing vco swing is varies over frequency range. please help me in this regard. Here i...
  5. S

    ADEXL Monte Carlo Simulation Error: no statistical data generated for the test

    Hi,i am also getting same problem in IC 6.1.5 could you help in this regard...
  6. S

    Pfd - charge pump simulation result

    Hi i designed charge pump by using switch at drain topology...and i also connected loop filter to charge pump charge pump specifications are i=75u loop filter specifications r=5.4k c1=4pf c4 =0.4pf here i attached the schematic and waveforms..... when...
  7. S

    how to do dc mismatch analysis in virtuoso spectre(IC615)

    thanks for reply... To do mismatch analysis which one i have to use it means whether ADE L or ADEXL could u give detailedsteps to do mismatch analysis in ADE
  8. S

    Designing single stage Operational Trans conductance Amplifier using TSMC 180nm

    **broken link removed** go through above link...
  9. S

    how to do dc mismatch analysis in virtuoso spectre(IC615)

    thanks for reply.. I am using cadence IC615 and did n't find any option in my spectre window...
  10. S

    differential amplifier input-output characteristics problem

    hi I am doing my course project on clock and data recovery. In that in phase aquisition loop phase detector is implemented by current mode logic.The problem is when i gave phase detector error output signal to v-i converter(Differential amplifier is one of stage used for voltage to cuurent...
  11. S

    how to do dc mismatch analysis in virtuoso spectre(IC615)

    thanks for reply should i include mc model file for to do dcmatch analysis... Here i am attaching the snapshot of mc files which are in my foundry library. could you suggest in which i have to include variations..
  12. S

    [SOLVED] how to plot vco frquency with variation of control voltage

    thanks a lot... i got vco curve...
  13. S

    [SOLVED] how to plot vco frquency with variation of control voltage

    thanks for reply.. i have done the procedure what ever you told ..but after i got struck at which option i have to choose to get vco curve here i am attached analysis window - - - Updated - - - attached image
  14. S

    how to do dc mismatch analysis in virtuoso spectre(IC615)

    I designed folded cascode opamp for gain of 57db and UGB 16Mhz.i want to to do dcmatch analysis for folded cascode op-amp.when i am doing dcmismatch analysis in spectre it is asking threshold value.I don't know how much value to give .i am using UMC 180nm technology in that i don't know how...
  15. S

    [SOLVED] how to plot vco frquency with variation of control voltage

    solved: how to plot vco frquency with variation of control voltage i designed cross coupled lc-vco with center frequency of 2.7 Ghz. i want to know how vco frequency varies with control voltage .for that which analysis i have to do.. please help...
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