Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello,
I am trying to use the "cross" special function in ADE calculator to detect where
on the "x" axis, a certain value on the "y" axis is crossed.
But "cross" finds the x axis value by looking at the edge.
But I have transient analysis switching data, with spikes
and hence I want a settled...
Thank you dick_freebird for the reply, so looks like the bandgap (tempco pic attached ) has
more negative tempco than positive tempco, so is that why the curve is flat around -200 degree celsius range ?
What should I do to increase the positive tempco and reduce the negative tempco so that I get...
I tested about 40 chips, but I measured each one individually, and each one had to be trimmed slightly differently
to obtain 1.25V.
I guess to select a common trimming for all chips, you need to look at which trimming combination gives you the closest
to desired voltage for all chips.
Hi all,
I was working on a bandgap reference circuit and I wanted to know if the Vbg versus temperature curve,
i.e. the bow shaped curve has to have a centre point (flattest part of the curve) at 27 degree celsius, for Vbg=1.26V.
I was trying to simulate my circuit and I see that my curve is...
thank you FvM and LvW for your response.
I have a fully differential amplifier. So should the test setup be as follows :
1)Unity gain feedback with OUTP connected to INM and OUTM connected to INP
2)DC source at INM swept from 0 to 2.5V (supply voltage is 2.5V)
DC source at INP swept from...
LvW, its required as part of project submissions. This plot will give an idea of the range of output voltage for which open loop
gain is constant I guess.
I found this old thread,
https://www.edaboard.com/threads/89279/.
I wanted some more clarity on the setup.
Hi all,
Does anybody know hw to simulate open loop gain vs. output differential voltage for
a fully differential opamp ?
So I need to generate a Av(open loop gain) (Y-axis) Vs output differential voltage(Y axis) plot.
JoannesPaulus,
I am sorry, I am not able to understand how VY decreaes.
If voltage drops across RB, RA1 and RA2 increase then doesnt it mean that VY also increases. ?
But since M1 is a Common source transistor, if its gate voltage (output of opamp) decreases the drain voltage should increase, this is what I understand.
So I dont understand why the drain voltage decreases.
Also, like you said if opamp output decreases, Vgs for the pmos increases, therefore...
Thank you, I was analysing it like this.
if V- increaes, error voltage (difference at opamp input decreases), therefore output of opamp decreases, therefore output of M1 increases
which means V- increases again --- > positive feedback. Isnt't this loop supposed to be having negative feedback...
Thank you JoannesPaulus...
now I have trouble identifying positive feedback loop and negative feedback loop for this architecture.
So, just for analysis if I break the loop going to the + terminal of the opamp and I look at the loop
connected to the - terminal of the opamp, it looks like the...
This is an informative thread.
So,
Gain (open loop) * 3 dB bandwidth (open loop) = Gain (closed loop) * 3 dB bandwdith (closed loop) for an compensated opamp (only 1 dominant pole before UGB).
Also if opamp is compensated, GBW = UGF
But if the opamp is not compensated, the the GBW (open...
Thanks you . I looked at it. The chapter talks about gain bandwidth in closed loop.
Actually I was trying to understand the difference between gain bandwidth in closed loop and in open loop.
Can you tell me how they are different. I understand that Gain * Bandwidth should remain constant.
So...
Thanks but I wanted to know from an equation point of view.
If the open loop DC gain is 100 dB and UGB is 25MHz and I connect this opamp in Unity Gain loop (voltage follower).
Then what is the bandwidth of this topology(voltage follower) compared with other closed loop topologies (for ex. with...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.