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Hi amihomo,
I am facing similar problemin HFSS in simulating a line-coupled BPF in stripline with microstrip transitions at both ends. When only the stripline part is simulated it is fine but when the microstrips are added the response is becoming distorted. Can you help me please on how to...
Thank you all for the solutions. I have another basic question. If I place a freq. doubler after VCO will the VCO gain/tuning sensitivity [MHz/V] also get doubled for loop bandwidth calculations?
Is there any measurement technique to measure the actual loop bandwidth of a PLL module. I am not asking how to calculate it by using any formula but how to see it practically using any instrument. How do you ascertain that the loop bandwidth of your circuit is matching your simulation results...
Yes...thank you...but how are you calculating that since both signals have -100dBc phase noise overall will be -3dB down...can you explain a little bit....what if the two noises are unequal e.g -90dBc for the loop and -100 for the cavity osc.? how to calculate...
about my 2nd qn...i am using M1...
I am planning for a PLL with mixer in feedback path for down converting to lower the N-value. Please discuss some doubts that i am having.
1. If the PLL output noise calculated from 20log(N) is for example 120dBc/Hz@10kHz offset and the LO used to down convert it has 90dBc@10kHz offset what...
Thank you nelsonys...i just want what you have mentioned...but i am new to pcb editor and dont know how to create island planes avoiding drc errors. can thermal relief be placed on the island planes? if possible plz provide some link or example on this...
I am new to orcad pcb editor. I am designing a circuit on a single layer substrate, i.e top copper/substrate/bottom copper. I want to place the components and most of the routing lines on the top layer but few routing lines will be in the bottom layer. The rest of the bottom layer will act as...
Thank you very much David for your response...actually I have no previous experience with microcontrollers....can i go for any popular 8-bit microcontroller for the application like atmega128 or pic18?....which one can be programmed using "C"....also I am unable to calculate how much...
Sorry my mistake...the IC no. is HMC702LP6CE....here is the link for the datasheet....the register maps are at the last of the document...
https://www.hittite.com/content/documents/data_sheet/hmc702lp6c.pdf
I have a PLL IC (Hittite HMC702LP6E) which contains many registers for programming the IC among which the maximum length is 24 bits. I want to load data into these registers serially from a microcontroller.Do i require a 32 bit microcontroller or i can manage with 8-bit or 16-bit ones......
I am planning for a Ku-band PLL synthesizer using two VCOS. Which one (FPGA or Microcontroller) is suitable for controlling the PLL IC and some SPDT and Analog switches....please explain...
Thanks...
I am planning for two architectures-
1> working in low freq and using a doubler(×2) at the final output
2>using a divide-by-two(÷2) prescalar at the feedback after the vco
In which architecture phase noise will be LESS???
Also please see the attached document.It is an application note from...
I want to get a dataset of a large number of frequency steps vs. corresponding tuning voltage of a VCO (Hittite HMC732). Is there any way to automatically sweep the tuning voltage and measure the output frequency to obtain a Vtune vs freq plot for the entire bandwidth?
Actually Hittite has...
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