soumyabumba
Junior Member level 1
I am planning for two architectures-
1> working in low freq and using a doubler(×2) at the final output
2>using a divide-by-two(÷2) prescalar at the feedback after the vco
In which architecture phase noise will be LESS???
Also please see the attached document.It is an application note from Hittite.It says that using a prescalar actually IMPROVES the phase noise while a multiplier degrades it.Prescaling is same as dividing the frequency right?...so why we read in books that setting a higher value of N degrades the phase noise by 20logN?
Thanks
1> working in low freq and using a doubler(×2) at the final output
2>using a divide-by-two(÷2) prescalar at the feedback after the vco
In which architecture phase noise will be LESS???
Also please see the attached document.It is an application note from Hittite.It says that using a prescalar actually IMPROVES the phase noise while a multiplier degrades it.Prescaling is same as dividing the frequency right?...so why we read in books that setting a higher value of N degrades the phase noise by 20logN?
Thanks