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have a doubt in CMOS
Hi,
That book by Sze is very good. I think it would suffice. For better understanding you may reffer to Brennan. This is simple.
I can mail you some slides regarding this topic, on later date, as i'm not able to find them on my comp.
"enjoy your work"
Hi dude,
Even if you code the design as in1<<in2, it will be converted into a combinational logic by the synthesis tool. Hence the computation will be finished in one clock cycle.
Division in velog will throw a synthesis-error, "divisor should be an integral multple of 2".
We have to use...
Hi dude,
I was also working with vhdl, when i was an undergraduate. Now my job demands me verilog.
Michael.D.Ciletti is a good book for verilog, which teaches you how to code synthesisible designs.
Samir Palnithkar is good for beginners.
"enjoy your work"
hi,
in digital design, we have logic states {1,0,z,x}
which correspond to {5v,0v,z,(1.8-3)v} respectively.
in std_logic, we interpret the values (1.5-2.2)v as weak-zero. same explanation follows for the others also.
we usually come across these logic states only when you are working with...
hi dude,
coding it in verilog is not a big deal, but first of all, let me know the description of akk the variables on right-hand side.
what's this v(n1) ? is it a function or variable?
and do specify the precision needed.
"enjoy your work"
dude,
juat as jay_ec_engg told, there should be some resolution logic, when both the events are happening at the same time.
because two alwasys blocks are desiging the same flip- plop, both will try to push contrary logic-states, and output will be indeterminate state.
better not to use...
hi dude,
at first place, i dint get the need for a mux/demux unit, that too on a bi-directional port.
i think that it will simply add complexity, at no rendered advantage.
please let me know the application.
"enjoy your work"
Hi dude,
I'm also implementing LDPc decoding algorithm. Till now synthesis is over. I'm also looking for the same. May be i can let you know when ever i get.
Please let me know, if you get a feasible option.
Regards
starters guide to verilog 2001 download
hi,
i've tried it on net. soft-copy is not not available.
it is a very useful book. better buy it.
sorry yar.
"enjoy your work"
wireless headphones
hi,
if you are working on windows, then there are plenty of readymade wireless headphones in the market, to attach to your computer.
in case you want to build one on your own, may be i can help you in a souple of days.
"enjoy your work"
hi,
at the first place, i dint understand the querry.
if it is regarding "digital to digital encoding", i'm briefing it.
normal encoding is a process of representing analog data in digital format. this is to interface with a digital system.
digital data sometimes needs to be encoded.
this...
hi,
this link gives a pdf about filter implementation in matlab.
**broken link removed**
you can use the following links for better understanding
**broken link removed**
this book is tough for begginers, but very informative.
Oppenheim, A. V. and R.W. Schafer. Discrete-Time Signal...
HELP NEEDED
software defined radio is a communnication system, which uses software for modulation and demodulation purposes of radio signals.
this reduces the complexity of hardware , but a bit slower than that.
there are few white papers available on net.
checkout.
**broken link removed**
Useful skew is operating condition sensitive?
hello,
useful skew is operation sensitive, because the timing considerations vary with the logic cloud, and the path it traverses.
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