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mismatch analysis and corner analysis
you mean monto-carlo, in ordinary corners, you assumed that all nmos will be fast or slow at the same time, and this is approx. true if they are close enough to each other, but as they becomes far and far, you may find that one is fast and other is true ...
i dont know where the spikes appear , you can upload snapshot to clarify , but you may have two kinds of spike:
1- as output is zero except in one combination only, so spikes appear superimposed on the zero level, this cause of the rise & fall time of the two signals, you may notice that this...
search net about cherry hopper amplifier, it will be explained in razavi in integrated circuits for optical communications, razavi published things about wideband amplifiers
as i see, you want to mirror by ratio 40 times , so as mentioned above, reference noise will be multiplied by the same ratio !! , increasing the size decreases the flicker noise of the devices & also the current source becomes better as its output resistance increases ( when you increase the...
Re: 50% duty cycle
depending on the application ; you can judge if certain duty cycle can make a problem or not, but generally , very low duty cycle means you didnt benefit from the low frequency you operate at, for example , if you make a divider in a PLL, this divider output will be an input...
Re: Does analog(or mixed mode) ic designer need script langu
Perl very usefull , specially if you use mentor tools, ocean very usefull for cadence tools, knowing skill language good but not important,
trade off between area and noise; larger Icp means larger loop filter cap, smaller Icp means larger noise, also , its value affects the loop gain and so affects poles & zeros positions, you might want a certain pole at certain postion for spur attenuation , i think Icp may have values between 1...
multi modulus divider
Thanks khouly, but i do know the PLL`s and that stuff, i just want a detailed explaination for the multi-modulus divider as a system functionality,
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