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Recent content by ravch

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    Common gate bias circuit for ATF541M4?

    Thank you guys for your replies. @vfone I am using this transistor bias for designing an oscillator. 10dB gain is good to have right? @RealAEL I have used the transistor model package in the simulation. I have to use this transistor which has two source pins after manufacturing the pcb. If we...
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    Common gate bias circuit for ATF541M4?

    Given: Vds = 3V and Ids = 60mA, Transistor = atf541m4 I am supposed to design a bias circuit in common gate configuration. (using FETcurveTracer template in ADS2011 I found Vgs to be 0.58V in common source config.) So I designed a bias circuit in common gate as shown in the image. Is this a...
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    Negative resistance fet oscillator, problem with transient of layout

    For Vds= 3 V and Ids= 60 mA, is this a good CG config?
  4. R

    Negative resistance fet oscillator, problem with transient of layout

    (1) I understand what you said. But, I dont mind to have 2nd or 3rd harmonics. I just want my circuit to oscillate around my frequency. Since it had to be excited to wake it up, will my circuit work after manufacturing. Is it a good idea to that way. (2)I would also like to try and design a...
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    Negative resistance fet oscillator, problem with transient of layout

    This is the .zap file of transistor atf541M4 ads model.
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    Negative resistance fet oscillator, problem with transient of layout

    This is a .rar file in which u can find the .zap file
  7. R

    Negative resistance fet oscillator, problem with transient of layout

    The results are the same when i tried to simulate the layout in microwave mode with two different frequency plans(both enabled) as you said. Now I tried to use vtpulse to trigger the circuit, i found the results as below.
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    Negative resistance fet oscillator, problem with transient of layout

    I tried to replace the ads model of lumped components with real values from murata library. I find the frequency in HB simulation as 5.375 GHz and the bias is good. But with transient, the bias is gone and frequency is 1.6 GHz. Like you said I tried to excite the circuit with a voltage source...
  9. R

    Negative resistance fet oscillator, problem with transient of layout

    I have simulated in momentum microwave mode, not in rf mode. And also it gives the correct bias when i annotate the DC_Solution.
  10. R

    Negative resistance fet oscillator, problem with transient of layout

    Bias: Vds = 3V, Vgs = 0.58V and Id = 60mA, Transistor: ATF541M4(avago), Frequency: 5.5 GHz Capacitor at source port to make the transistor unstable. Using the design rules to design the negative resistance oscillator, matching networks have been created using stubs. The matching networks are...

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