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Recent content by paulux

  1. P

    auCdl netlist subckt missing parameters

    Hi, In auCdl netlist generation, I want to generate the netlist shown below XI1 net16 gnd! / rnpoly2 rl=20 rw=2 .SUBCKT rnpoly2 MINUS PLUS rl=2 rw=2 RR0 PLUS MINUS 190*rl/(rw-6.2e-3) $[NS] $W=rw $L=rl .ENDS But the generated CDL out file (File->Export->CDL) is XI1 net16 gnd! / rnpoly2 M=1...
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    How to use .measure in Hspice to get max. gm in a MOSFET sim

    Hello, Would you suggest how to use .meas to get the max. Gm of a MOSFET in Hspice when sweeping Vgs value at a fixed Vds voltage? Also, after getting this max. Gm, could you suggest how to get its corresponding Ids value and the slope of Ids at the max. Gm value in Hspice? Thank you in advance
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    Walkie talkie Transceiver Design Reference?

    Thanks so much for all replies. I am just a beginner of RF circuits. The target spec. (27MHz/49MHz) is recommended by other. I have no idea about it but am interested very much to know more and don't know how to reverse engineering. Since most transistor type walkie-talkie does not provide the...
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    Walkie talkie IC Design ?

    Hello, I am looking for the walkie talkie transceiver integrated circuit design but could not find it. Does anyone please help to provide some reference materials? Someone told me that the principle of walkie talkie is from super-regenerative principle. Several papers from JSSC discuss this...
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    Walkie talkie Transceiver Design Reference?

    49mhz transistor walkie talkie spec Hello, I am looking for the walkie talkie transceiver integrated circuit design but could not find it. Does anyone please help to provide some reference materials? Someone told me that the principle of walkie talkie is from super-regenerative principle...
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    basic question about biasing

    The mismatch is due to early effect of the transistor Mn. This can be improved with longer L.
  7. P

    loop gain of two stage of opamp

    The loop gain is not zero. A good reference can be found from P.Gray textbook. The input-to-output connection is implicit on your opamp system (especially transistor level). The two poles are usually located at (1) at the connection between the output of 1st stage and input of 2nd stage, (2) at...
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    Hspice error: xsram has 34 nodes, sram has 60 nodes

    Re: hspice error Or you attached the wrong subcircuit???
  9. P

    hspice issue"timestep too small"

    site:www.edaboard.com tran option trap Sometimes due to model non-convergence....but this could be improved if use Hspice 2006 version.....
  10. P

    The type of fading in wireless channel

    Re: fading I used this book,....just a reference Wireless Communications: Principles and Practice (2nd Edition) by Theodore S. Rappaport and Theodore Rappaport
  11. P

    What is the meaning of ladder diagram ?

    Re: ladder diagram where is your wording appearing? From filter topics?
  12. P

    Help me with setting a microphone network

    Re: Microphone Network I remembered I saw something in website of National Semiconductor.
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    How to do the CMFB partition?

    Re: CMFB partition? yes I agree with you that CMFB should generally response faster than differential loop. Otherwise the common mode of the signal would fluctuate. If two transistors is responsible for CMFB, then you have 2 degree of flexibilities to adjust your common mode voltage. It depends...
  14. P

    How to measure the parasitic capacitance of an inductor coil

    Re: Parasitic Capacitance You can try to put your inductor in the impedance measurement machine to plot the equivalent impedance and you will observe the parasitic effect of your inductor
  15. P

    the depletion device in cmos analog design

    depletion device is mainly be used as a resistor with Vgs=0.

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