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$display verilog
I think you need another board to interface to it as it does not have an lcd,right?
pls check at this page.......it may give u some idea
#852813
Hi,
I am using Questasim 6.3a and while simulation I got the following error can any body help to solve it
do E:/ISEproject/rahulextry/pciev1_9de2/pciexde2/pciede2ip/simulation/functional/simulate_mti.do
# ** Warning: (vlib-34) Library already exists at "work".
# Reading modelsim.ini
#...
what is the diffference between fpga and cpld
AS I AM NEW TO CPLDs AND FPGAs CAN YOU POST ME SOME DOCUMENTS ON FPGA AND CPLD DIFFERENCES.AND HOW TO DESIGN AN ADC IN THE SPARTAN 3E FPGA.ANY MORE DETAILS ABOUT THE PROGRAMMING PLEASE SEND TO ME.
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