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With change so fast today, the field we are working in may not be active in 10 years next year , in addition to building deep knowledge and experience in a certain discipline, learning technically multilingual across other domain in IC design, it will help us have a brighter future (even if...
Thanks FvM,
When combining ground, the ground of digital and analog will conenect together in the chip, and this ground is bonded to PCB (12 bonding wire) and when separating ground,the ground of digital and analog will seperated.
I consider the noise from digital, there is no path between...
Hi,
My chip has the digital section and analog section, to reduce influence noise from digital, the power and ground are separated.
I can see a real effect when it comes to power separation, but separating ground doesn't seen to have much effect.
My set up DVSS and AVSS to verify separating...
Hi everyone,
In some datasheet of IC, the modes of IC is determined by a pad (3 mode - floating, connect to VDD, connect to VSS).
Any circuit can do that?
Thanks,
minhchau
Hello,
I am learning nested Miller Compensation to design LDO.
This image show the block diagram for a three-stage op amp with nested Miller compensation.
If I use nested Miller Compensation to design LDO the system will have about 3 negative feedback loops,
when I evaluate the system's...
Thanks you, Dominik!
Do you have any specific documents or examples about this distinction?
If I use nested Miller Compensation to design LDO the system will have about 3 negative feedback loops,
when I evaluate the system's stability (by stb simulation in cadence) do i need to consider...
Hello,
I am learning nested Miller Compensation to design LDO.
This image show the block diagram for a three-stage op amp with nested Miller compensation.
I have a few question:
Are Cm1 and Cm2 in feedforward path or feedback path? why?
And can you help me differentiate between feedforward...
Re: Digital Transition Capture
Hi,
We need to operate at the frequency greater than 10MHz. Is the IC 555 can work in this case? Is this depend on the technology?
I wonder if I use 65nm CMOS technology with the same topology of IC555, can I obtain the expected operation frequency?
Thanks,
Chau
Hi everyone,
I have three types signal: Long string signal (several us), Low Frequency Periodic Signal (30MHz) and Supper Speed signal ( 10Gps). The maximum clock I can use is 30MHz. How can I detect the long string signal with minimum delay? This image show detail the signal.
Thanks,
Re: Digital Transition Capture
Hi Akanimo,
Thanks for your help.
This circuit work with clock frequency is smaller than the input signal frequency.
Therefore, I think it is impossible to use the your method.
Hi BradtheRad,
Thanks for your help. The method use 555 timer IC is very...
Hi everyone,
I need a circuit is designed to detect whether there has been at least one transition during the past clock period. This image show detail the operating principle of the circuit. I am not specialized in digital, so i don't know this circuit is possible? Please give me some...
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