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How does digital flowchart look like ? How to translate requirement to RTL?
Hi guys,
I have been a co-simulation engineer for many years. But I have much interest in digital IC design. There's always a question in my mind that what a IC designer experiences from function requirement to RTL...
simulation time systemverilog
Currently, we are asked to convert a model written in PLI to one in systemverilog because it is complained to slow down simulation time.
I want to know whether this opinion is true.
Thank you in advance.
how to open fsdb files in verdi
Solve it by checking Novas document.
Need to add option +cli+3 -line for compilation such as:
vcs +cli+3 -line -f run.f ...........
verdi fsdb
Hi, all
I use VCS to compile and simulate a few verry simple verilog files. Testbench calls the tasks below to dump fsdb file.
$fsdbDumpfile("dump.fsdb");
$fsdbDumpvars;
Then I run command to pop up verdi
verdi -2001 -autoalias -f run.f -top system -ssf dump.fsdb...
This is just a simple example using TK. As for the application, I need to create a popup window ( which is generated through "toplevel" command). This window will accept input of some parameters while show the corresponding result.
BTW, what's "Instead DVE should allow this?" mean?
hi, spauls
Could u help me check the TK scripts below in VCS:
#!/usr/bin/wish
toplevel .top
button .top.quit -text Quit
pack .top.quit -padx 20 -pady 10
Above TK commands are totally not recognized by UCLI. But Modelsim can.
If VCS does not support TK, do you have other approach to...
vcs ucli gui
Hi, all,
I am responsible for shifting from Modelsim to VCS MX environment. There are several Tcl files which perform well in modelsim. But when we run in DVE, some commands inside these files are not recognized by the UCLI. Such as:
winfo, toplevel
It seems that these commands...
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