Which takes shorter simualtion time, systemverilog or PLI

[Merlionfire]

simulation time systemverilog

Currently, we are asked to convert a model written in PLI to one in systemverilog because it is complained to slow down simulation time.

I want to know whether this opinion is true.

Thank you in advance.

 

[ljxpjpjljx]

Re: Which takes shorter simualtion time, systemverilog or PL

yes, you can shorten the simulation time using SV , because the PLI will be called each time it used! and the SV is compiled with the Whole DUT and testbench, so it will be faster!