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Guyz ,
Why cant we start a thread regarding verification using system verilog instead of multiple threads so that it is easy for anyone to follow rythem.
Here we can discuss all problems we are facing daily using sv and solutions for those.
regards
Mallik
Hi,
Anybody working on usb2 or usb3 please post ur doubts or suggestions .
Sothat it could useful for many people whose working on usb .
regards
Mallik
Hi All,
I need some information regarding high speed usb . While the device in test mode, (if i set the device into transmit test packet ), what should be the test packet send by the device .
Could any one give the pattern of tets packet .(53 bytes of data ).
regards
Mallik
faq on system verilog
Yaa man these are basic questions in systemverilog . If u know some of the questions u can post rite so that it can helpful for others .. i am trying to form a group of people whose working on systemverilog ..so that it can helpful for most of the people who started...
system verilog interview questions
Qi1)What is callback ?
(Qi2)What is factory pattern ?
(Qi3)Explain the difference between data types logic and reg and wire .
(Qi4)What is the need of clocking blocks ?
(Qi5)What are the ways to avoid race condition between testbench and RTL using...
hi ,
i am inviting u all to discuss abt verification.
u can discuss here how to create verification environment, what stuff required to prove a good verification engineer,how to write bfms, etc.
u can post material here or books upload/download section or paste links...
Re: Book needed
hey,
that book is there in book upload/download section.
u go that section and search with the name "verilog"
regards
mallik
09739145146
Added after 25 seconds:
hey,
that book is there in book upload/download section.
u go that section and search...
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