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Recent content by LaughingMAN

  1. L

    RF Power Amplifier Measurement

    I'm confused about the 50ohm load in the RF Power Amplifier. My questions are: 1. In simulation, I usually put in the 50ohm load, but when you do the actual design, do you omit out the load and replace it with an external load to do measurement? What would happen if you don't put in the load...
  2. L

    How to make a simulation on Cadence using .mod files?

    Re: model files for spectre Hi, You can try using the spice model library in spectre by adding this to your spice model library and using the +csfe command option in spectre: library name_of_library section name_of_section simulator lang=spice .model.......}spice model +... +... simulator...
  3. L

    How to optimize large transistor layout for RF PA

    Is interleaving the current path forward and return, a way to reduce the inductance of the PA? Is there any references or papers to show how to model the inductance in the RF PA?
  4. L

    Why do we get layout grid errors?

    offgrid error It might also happen because the grid you used might be smaller than the grid given in the design rules.
  5. L

    Cadence error: M1 is an instance of an undefined model nmos4

    m1 is an instance of an undefined model nmos4 Hi, Did you include the library in your netlist? Why don't you show the netlist so that it is easier to find the problem.
  6. L

    How to optimize large transistor layout for RF PA

    The techniques that you refer to are mostly used for matching or is it used for wide transistor layout in PA?
  7. L

    Pls recommend me some documents on PA design

    Hi, You can find lots of book on PA design on h**p://file.21ic.com.cn/RFDesign/
  8. L

    Waffle v/s Stripped Layout

    waffle layout of mos transistors Hi All, Where can I find an example of a waffle layout technique? Thanks.
  9. L

    Can I make PA in TSMC 0.18 cmos?

    Hi, The main problem you will face in designing PA in cmos is the low quality of the inductors compared to the ones offered in SiGe. On the other hand, if you are planning to use external matching component than this wouldn't be a problem.
  10. L

    How to get input impedance of this one

    Hi, Are you going to use hand calculation to find the input impedance or simulators such as Hspice to plot the impedance?
  11. L

    How to optimize large transistor layout for RF PA

    rf layout Hi all, I'm drawing the layout for a rf power amplifier and I would like to know if there are other ways of optimizing the transistor (other than finger) to reduce the parasitics of the transistor? What are the techniques used normally for drawing transistor layout in rf power...

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