Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
I ham having a design where bus have to travel 4mm of distance in 28nm design. What i am seeing is that clock signal gets inverted after every re timer stages but data bits does not. How does this kind of configuration help?
Regards,
Jay
Hi folks,
I have seen few zero cycle ( set_multicycle_path 0) setup paths in design. Can you explain why there is a need of having 0 cycle setup path? what is a advantage of the same? How do we check hold violations for these kind of paths?
Regards,
Jay
Abhishek,
if it is a digital design, you gate voltage can be any thing more then drain and less then the maximum limit given by foundry.
For analog its tricky. Analog experts can comment on it.
Jay
Abhishek,
Where are you giving this maximum voltage? if it is on gate, gate oxide thickness will decide its value. foundry datasheet should provide these information.
Jay
jaya sree,
latency numbers can be accepted. Can you tell me if clock skew numbers are global skew or local skew? By any chance did you turned on use of useful skew to meet timing? if that is the case and your timing is good. no need to worry.
Jay
Re: Antenna violation questions (metal jogging, diode insert
if routing resources permits go for jogging. for adding diode you might move some cells. and may cause other drcs. ( not preferred at last stage of design when tape out is hanging on the head)
Hi all,
You might be knowing that latest magma timer ( tack ton) is supporting sdc format only. I need to apply hold margins on few flops. Can some one help me with command to specify hold margin in sdc format?
it would also be very helpful id some one can provide SDC command manual ...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
