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Hi folks,
I have a problem when i try to generate gerber files with altium designer. I have a two layers board with polygon poors acting as nested powering regions. When i generate the cam file there is no problem, but as soon as i export the gerber files for my top and bottom layers, all my...
Re: Delay Element?
I'll add to Echo47 that the delay element are on Xilinx Virtex-4 and Virtex-5. It's a bunch of delay taps that you can adjust on each IO for dynamic phase alignment solutions for high-speed source-synchronous interfaces.
refer to this article for more info
**broken link removed**
Re: DCM?
An esay way is to use the Xilinx Core generator. It will guide you through the process and generate an HDL template that you can copy and past on your design.
You can also refer to your device user's guide for the clocking ressources and it will give you examples on how to instanciate...
routing from orcad
Hi dears,
I have a basic question. How to achieve in Orcad high speed routing of equal length traces (bus and clocks), differentiel Lines? Is it supported on Layout? Layout Plus? Specctra? Thanks for any information or any tutorial on the subject.
Jack
Hi all,
I'm looking for the Complete PCB Design Using OrCad Capture and Layout by Kraig Mitzner book compagnion CD. I'm only interested to the examples and not the hole CD with the Orcad demo version.
Thanks for your help guys.
Jack
Hi every body,
I wonder if some one can tell me if the Xilinx JTAG III is compatible with the JTAG PC4??? I have an ML310 developement board, but no JTAG cable, so i looked around in the net and i found JTAG III Schematic but in all the tutorials of the board they use the JTAG PC4. Is it...
Hi,
I'm familliar with FPGA design, and i did a small project for ASICs. My question is about the P&R and de Maks design for ASIC (CMOS technologie at any level) what are the tools that i have to use??? For the Mask design, is it an automated process, or i have to do it buy hand???? Thanks...
Hi,
You can consult an application note from xilinx, VHDL tips for arithmetic operation, it gives you some examples on writing arithmetic functions (adders, magnitude comparators,...etc) and they are evaluating the number of LUT it will need. Basicly ton sum two numbers described with 4 bits...
precision rtl synplify comparison
Hi all,
I used synplify pro and leonardo spectrum to synthesis a design and every time i did that, for small pices of VHDL code or a large design, the maximum frequency evaluated by synplify was greater than the one leo give. I know that's only an...
simulink pll digital
Hello,
I'm looking for any help about digital PLL. I did the design af a PLL in simulink and i'm looking for any document about voding it in VHDL.
Thanks for ur help
Re: DSP or FPGA
Hi,
This is basicly a simple and hard question at the same time. I took a course about Programmable logic and VLSI design and what i retine is that it depends on the timing you want to achieve, the time to market, and the quantity you are going to sale.
For simple...
Hello,
I made some research in the web and this is the manual of your board
**broken link removed**
It will describe you the diffrent way to load your design to the FPGA. Just connect the parallel port, powert up and fire the Impact software in ISE it will be very easy:)
You can...
BGA part soldering
Hi all,
I'm very new to PCB design and i wonder if there is any tutorial that descrube how to solder BGA parts (for FPGA) to the PCB. I seached aroud the web and i find some documents, but i wonder if some body have a more explicit document.
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