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Recent content by guamak_menanak

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    1.8V transistor opamp design for 3.3V supply

    3.3v opamp Hi... Does anyone have doc/paper/idea for opamp design that need use 1.8V transistor (EOS limit for Vgs,Vds,Vgd = 1.9V) that powered by 3.3V power supply. Opamp input is based on 3.3V signalling. EOS limit is a big challenge here since not able to divided down the 3.3V opamp input...
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    PSRR calculation question

    psrr calculation Hi... If my PSRR is 20(not in dB) and I have 50mV noise on power supply, what will be the offset of my opamp? Is it 20*50mV? Thanks:)
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    MOS Transistor Sizing (analog, digital, and mixed)

    mos transistor sizing we used bigger size of gate to ensure circuit realibility... :D
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    single to differential signal

    Use balun circuit... :lol:
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    transistor fingers - transconductance layout

    If I'm no mistaken... Using multi-finger tends to give bigger paracitic capacitance... Is it true? 8O
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    Who is your idole in Analog Design?

    Eventhough they(razavi&others) are not the important person in designing latest product, but because of them we know the fundamantel of analog IC design... Maybe they are not heroes, but they are like a main 'root' for an analog IC design 'tree' :D
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    Fundamantel for Analog IC Design

    dan klein+analog layout Last week, I attended an interview session for a design company. After the interview session, I asked them to give some recommendation to increase my knowledge on Analog IC Design. The asked me to increase my knowledge on "Fundamantel for Analog IC Design". Can anyone...
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    Who is your idole in Analog Design?

    I think because the cost of manufacturing is cheaper here! But actually, now many manufacturers are looking at China because China provide cheaper salary and have many workers! Malaysia is now trying to gain more on design and R&D... One of the reason why some of the ICs are not design here is...
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    Why we do Low Voltage Analog IC design ?

    Re: Low Volatge Analog IC. 2) like in point1 since the maximum voltage swing is limited thus the architectures to be used are only folded cascode as an example...but please not the that the DC power consumed will be two times higher.... ..anyway so if we still use telescopic based config for...
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    How to reduce the noise of a circuit?

    Re: noise reduction you need to study the source of the noise such as flicker, thermal etc.. study the equation and you can find which parameter can be adjuct to lowering the noise... for example... to reduce flicker noise...you can increase the width of the transistor!
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    Critical requirement for op-amp layout

    Re: op amp layout Do we have the e-book for that book? :D
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    Who is your idole in Analog Design?

    Digital = only 2 points 0 @ 1 Analog = to many points to measure :cry: That's why analog designers are hard to find :D
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    Difference between simple cascode current source and modified Wilson current source

    mos wilson current mirror I had used 'cascode current source' for my DAC... I think the it can mirror current very well! I think there is not a very big issues on those current source... 'cascode" and 'wilson' is a good current source.... You can read form books for better explanation... I...
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    Why do want the inverter response to be symmetrical?

    Re: Inverter nMOS use electron but pMOS used hole as a carrier. As you can see, electron is faster than hole, so we need bigger pMOS to make sure timing of the nMOS and pMOS is equal! :D
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    Transistors in LNA work in satuation or linear?

    It is better to have all the transistor in the saturation region, to make sure that your design is stable if there are some voltage drop. I'm not very sure on why sometimes we used linear transistor, if i'm not mistaken transistor in linear region act like a resistor. Furthermore, someone told...
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