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Recent content by energy_baz

  1. E

    decalaring many constant in 1 name...

    how about the constant value 5,6,7? Do i have to declare it in the package as well? I need to include all these value later in generate statement..which it will be call in my generic map..
  2. E

    decalaring many constant in 1 name...

    can we use generic in package..? I read from this....https://www.edaboard.com/threads/23546/ we can't use generic in package....it only accept constant....
  3. E

    decalaring many constant in 1 name...

    hi, I have question on how to use array to declare my constant values. I want to use all the constant value in generic map. So, should I declare all the constant in generic..? As example : constant ( z : integer := 3); type a is array (0 to z-1) of integer; constant b : a := (3,5,7) I need to...
  4. E

    constant value in VHDL

    FvM : I have to delete all the codes immediately because it might cause me plagiarism for my project. That's the reason why I'd deleted all those codes. Sorry about that.
  5. E

    generic map in generate statement...

    hi, could anyone please help me....i'm trying to edit my code to be a generate statement...However, I don't know whether is it correct to use this way to implement my code because there are lots of errors on it...
  6. E

    constant value in VHDL

    noted, thanks guys...=)
  7. E

    constant value in VHDL

    I'm not sure how to use the variable....is this the correct way..?
  8. E

    constant value in VHDL

    hi, Can I use this way to declare all my value for the constant because i need to use all these value in the same name.? Any idea how can I declare all these value in the same name..?
  9. E

    diminished number system

    hi, could anyone help me to explain how does diminished number system work.?
  10. E

    error on VHDL program....

    thanks...it's work now...;)
  11. E

    error on VHDL program....

    so, I have to convert wire1(n) into unsigned/integer is it..?
  12. E

    error on VHDL program....

    hi, could anyone help me to fix this error...the error state : Found 0 definitions for operator "+"...thanks :)
  13. E

    error on VHDL program....please help me...=)

    hi... I need a help to fix this error....the error states Line 25: Found 0 definitions for operator "-". and this is my program code and I had highlight the error in pink color....thanks..
  14. E

    adder with register (latch)

    I have to do the VHDL code for the diagram which mean I have to convert the schematic to the VHDL code. It's a generic and modulus adder which involve a latch register feedback as you can see diagram. As example, n = 3 which it will be 3 bit signal and the mod is 5 where the program will be...
  15. E

    adder with register (latch)

    thanks....it's work..but I need to include the latch register in this code.... this line should be the latch register...but i don't know how to insert the latch register in here.... wire2 <= ('0' & wire1 (n-1 downto 0)); again...really need u guys to help me....=)

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