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Recent content by elantra

  1. E

    Milliken's capless LDO technique

    millikens capless ldo jt_rf, for your question, maybe the only way to fit the tight spec is to increase the loop transient response, but it always means to increase Iq, for low Iq LDOs, it is very tough tasks to have fast response. For example, 100uA for a 5mA loaded LDO sounds reasonable...
  2. E

    Virtuso Chip Auto Route Manual

    I checked the docs, and only found Virtuso Chip Assembly ....
  3. E

    Understanding Rule File

    maybe check the cadence documents is a good approach.
  4. E

    BJT ESD failure, anyone has experience with that?

    Is it possible from the temperature variation? for example, the different package or bonding changes the thermal conditions and ...
  5. E

    efficiency of DCDC power management

    of course the effiency is the higher, the better. the problem is, in some applications, you are not possilbe to acchieve 98%, even 90%. so, talking about this issue without the application is none-sense.
  6. E

    design spec of LDO regulator?

    of course max load. your design should cover all the load range, so the spec should be at least the upper load.
  7. E

    A design problem regarding voltage generator

    A design problem the rail is relative, in other words, you can connect the input of the opamp to 0.5 Vcc, then it's OK to assume that the opamp uses "negative rail" of 0.
  8. E

    bandgap generator at low supply

    it's possible, but, if you run the simulations under corner, be careful, some cases, the performance will be quite bad if you need good transient performance, good accuracy, quick start-up,etc. You know, with low supply, some fets will work abnormally.
  9. E

    bandgap floor planning

    Thanks, electronrancher! You know, many experienced designer told me about this issue, but I did't have chance to know why. thanks again.
  10. E

    How to improve LDO's transient response?

    improve transient response of ldo LDO for RF circuit, the external cap may be a must, you know, without the cap, the psrr would be quite bad. this is important.
  11. E

    How to protect IC from the heat in circuits?

    truble shooting If you design this ic, add thermal protection circuit, if the chip is too hot, shutdown it.
  12. E

    bandgap floor planning

    Does somebody have ideas why the bandgap circuit is not suggested to place close to the scribe line?
  13. E

    How to determine PSRR of LDO using Hspice?

    PSRR of LDO Normally, 70db for 10KHz should be very difficult to get. This type should be used for low noise rf blocks.
  14. E

    Input Current of CMOS Opamp

    sometimes the ESD structure will have some leakage current under certain condition.
  15. E

    LDO with smaller output noise and bigger PSRR

    Williamy: Are you sure your LDO's spec? Not easy to understand.

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