Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by bunda_bindaas

  1. B

    Telescopic OTA DC Gain in 130 nm

    With a telescopic cascode and 1.2 V supply, what kind of output swing are you expecting? Even if you use 0.15V as your VDS for each transistor, you will exhaust 0.6V in just the cascodes. That leaves you with at best 0.6V of o/p swing. Is that ok for your design?
  2. B

    How to do a distortion Analysis of a Differential Amplifier?

    I am looking for ways to reduce the third harmonic from the output of a differential amplifier. Are there any papers detailing distortion analysis? any good books which relate to this topic that anyone can recommend? Any help will be deeply appreciated!
  3. B

    "Basics" of Analog Circuit Design

    uyemara book Can somebody elaborate on the "basics" that one must absolutely be aware of, to learn analog circuit design? Let's break it down to each topic...say 1) Single Transistor Topologies 2) Diff Pair 3) Current Mirrors etc.. What is the "experienced" view on this? Does everyone...
  4. B

    How to determine the phase margin of an opamp in Cadence?

    phase margin and cadence Stability Analysis in Spectre is there. Alternatively, you can break the loop (at a high impedance node) and run an AC analysis to view the PM
  5. B

    Design of low noise op amps at low frequency

    Thanks for the help but I can not use chopper stabilized techniques for my op amp. But thanks anyway. It seems I can only increase the size and burn more current to reduce the 1/f noise.
  6. B

    Design of low noise op amps at low frequency

    I need to design a very low noise op amp at low frequencies. Can anyone please help/guide me to relevant papers or journal articles? Thanks
  7. B

    Looking for SPICE models in 0.13 um technology

    Hi, I am trying to simulate some circuits on my home PC using WinSpice. I was wondering if someone could direct me to spice models in 0.13 micron technology. There are models available for MOSFETS but no models for resistors and capacitors. I don't wish to use ideal elements. Please help
  8. B

    Mixed Signal/Analog Design in 45nm?

    What will be the key issues in designing analog/mixed signal blocks in 45nm/65nm CMOS process? I'm talking about blocks like Bandgap References, PLLs, ADCs etc. Also design of SOCs in 65nm and beyond have a 95% first-time failure rate. Is that true? What are the potential bottlenecks in first...
  9. B

    which hspice command i an use for calculate static power!

    Re: which hspice command i an use for calculate static power You can run a transient analysis of your circuit and calculate the average current from the supply. This takes care of both static and dynamic power consumption. The average current then multiplied by your supply is the average power.
  10. B

    High Speed Digital Design/USB

    I'm working on the design of USB 2.0 transceiver and I need to find reference materiel for High Speed Driver, Full Speed Driver etc. Are there any books that cater to the design issues encountered during design of high speed data transmission? Is USB hardware design a very promising field? What...
  11. B

    Help Required with Voltage reference generator circuit

    Please look at the following circuit. The input to the Op Amp is from a BGR. The Op Amp is a P-input 2 stage miller OTA. The problem is that when I'm doing a transient analysis, all the reference nodes start oscillating as I ramp up the supply. Why is this happening? I have compensated the OpAmp...
  12. B

    Parameter distributions of Monte Carlo analysis

    Re: Monte Carlo Analysis As a rule of thumb, the number of MC runs is 10 times the number of circuit nodes/transistors in the circuit. I go for the number of transistors in my MC mismatch analysis.
  13. B

    What is "Corners simulation" ?

    Corners simulation takes into account the loading in the Power Supplies, Temp changes and changes in the process. You design a circuit in the typical case (VDD=typ, T=27 and typical process parameters) and then you check by changing the supply voltage, temperature and the process parameters to...
  14. B

    Large signal MOS analysis model

    Re: MOS big signal model Yes there is a large signal model for MOS. It's a switch connected in series with an "on" resistance of the MOS. There is also capacitance Cox between gate to source and drain to source. Please check out chapter 10 of CMOS circuit design, layout and simulation by...
  15. B

    Who is your idole in Analog Design?

    I learned the basics of Analog Circuit Design from Sedra & Smith. Before that, I used to read a book called Integrated Electronics by Jacob Millman and Christos Halkias, which really scared me away from analog. I consider Grey and Meyer as the best authors in this field. And may I suggest...

Part and Inventory Search

Back
Top