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Recent content by Big Boy

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    EP4CE6 and EP4CE10, same device?

    Yes, I taught about defects, or binning, as this usually is the case with other devices line multi-core CPU, where they disable some defective cores. The thing is that it's logical with CPU, which have very clear cut boundaries between the core (use the whole core, or disable it if there's a...
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    EP4CE6 and EP4CE10, same device?

    I was looking over the handbook, and I made a strange discovery. The Altera Cyclone IV EP4CE6 and EP4CE10 has the same bitstream size, and the same IDCODE. Even looking at the chip planner, they look identical. I was wondering if they are in reality the exact same device, labelled under...
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    Synplify 8.6.2: Internal Error in c_ver.exe

    internal error in c_ver.exe Hello I came across a bug in Synplify 8.6.2. When compiling a project, I received: --------------------------------------------------- #Build: Synplify Pro 8.6.2, Build 013R, Jun 5 2006 #install: C:\Winappl\Electro\FPGA\Synplicity\fpga_862 #OS: Windows XP 5.1...
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    IS Ib different from Ic and ie as current?

    Actually, when you have electric current, you must see it as a flow of electron. It does not work in the way you explain. Yes, free electrons do re-combine with the atoms core (the 'holes'), but when a voltage is applied across a conductor, electrons also get 'ripped' from the atoms and become...
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    how to extract the contents of a bit file

    fpga model extract from mcs file If your only intent is to extract the bitfile raw data, for the purpose of programing to a PROM for example (or configuring the FPGA using a microprocessor), you can use iMPACT. You have 2 major mode in iMPACT. One is FPGA programming (you scan the chain...
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    What is the Difference between a PCI Video Card and a PCI Express Video Card?

    pci vs. pci express Though, one advantage (correct me if I'm wrong), of PCI-E, is that you can put a card at a different X settings than the slot is. For example, if you have a 8x slot, you can put a 1x, 2x or even 16x in it. If you put a lower card, the rate will be the one of the card. If...
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    Xilinx ISE Coregenerator...is it really usefull?

    It is used for passing along IP cores. For example, if Xilinx make a PCI core, they may not want to give the source, but using coregen, the IP is pre-synthesized and generated as an EDIF file targetted/optimized for your specific FPGA (Spartan 3, Virtex 2, ...), along with wrapper VHDL or...
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    microprocessor VS microcOntroller

    microcontroller versus microprocessor Usually, microprocessor is only the core. It is a CPU, sometime a memory controller, and that's it. You have to use it with other components. You need to add memory, IO, devices, ... Microcontrolers are targetted toward embedded applications. The point...
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    How to do reverse 1-hot encoding in VHDL?

    Re: Reverse 1-hot encoding? The way I see is to do a priority encoder.
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    LED color controlling using drop voltage???

    I did some crazy (read: destructive) experiment by putting high voltage (3~10V) on a green led. Playing with the voltage, I could turn it yellow, and even dim red, before it blew! :D In short, no, you can not use voltage to change LED color. Leds are not designed for that. You can make it...
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    How to display characters on a vga console?

    Re: vga console Well, you may be able to find fonts on the Net, but if you have the skill, you can dump an 8x8 character set from your PC BIOS. Every BIOS have some character sets at pre-defined places. Now, let me search where it is... Ok, from my trusty old system info bible...
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    How to display characters on a vga console?

    Re: vga console First of all, everything should be pipelined. So, in your stages, for each line, you can - Read the character to be printed. - Calculate the ROM address based on the character and line number (this can involve only bit shifting). - Read the ROM data and use it to print out the...
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    output is different than simulation

    You probably have non-synthesizable code, or using dangerous directives. For example, bad use of parallel case and full case in Verilog: http://www.sunburst-design.com/papers/CummingsSNUG1999Boston_FullParallelCase.pdf Or http://soccentral.com/goto.asp?EntryID=1124
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    18-bit 1024 locations RAM in Spartan-3

    1024*16 bits sram Simply put 2 or more in parallel. You tie the address, control, ... everything together, except for the data. You can separate write-enables too, if you want to be able to write only to one of the 16-bits word. So, for example, if you want 32 bits wide, but wish to be able...
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    HOW TO REDUCE AREA INSIDE THE FPGA

    You can also look at this **broken link removed** It's some guy who built a processor, and had area problems. He optimized his design, saving a lot of resources, and he's commenting on how he did it.

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