Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by Abisheak

  1. A

    Performance measure and utility function measure

    i would like to know which is a better option?Performance measure-we build according to what is needed. utility function measure-good in partially observable environment as it guesses the sequences of actions and maps it accordingly and also averages the best possible outcome of the agent...
  2. A

    Artificial intelligence

    Hello, I would like to know the difference between goal based model and simple reflex model. and also about the agent functions. thank you
  3. A

    VLSI masking and photolithography

    hello everyone 1.Why do we mask the silicon wafer and distinguish the chip into exposed layer and unexposed layer? 2.what is photolithography? (It uses light to transfer a geometric pattern from a photomask to a light-sensitive chemical "photoresist", or simply "resist," on the substrate)...
  4. A

    VHDL coding -architecture phase

    thanks dude.That is really helpful :)
  5. A

    VHDL coding -architecture phase

    I found this code in Doughlas perry's book on VHDL.If possible could u please suggest me some good VHDL book?
  6. A

    VHDL coding -architecture phase

    Tried figuring out with the circuit diagram. thank you mate. and i guess the AND gate should be changed to COMPONENT andgate PORT(a,b,c,d :IN bit ; x :OUT bit); or should i leave out the ENABLE part of the mux connection? or Does a,b,c,d refer to enable latch of the AND gate?
  7. A

    VHDL coding -architecture phase

    ARCHITECTURE netlist OF mux IS COMPONENT andgate PORT(a, b, c : IN bit; c : OUT BIT); END COMPONENT; COMPONENT inverter PORT(in1 : IN BIT; x : OUT BIT); END COMPONENT; COMPONENT orgate PORT(a, b, c, d : IN bit; x : OUT BIT); END COMPONENT; SIGNAL s0_inv, s1_inv, x1, x2, x3, x4 : BIT; BEGIN U1 ...
  8. A

    VLSI based projects for begineers

    Hello everyone , I am looking forward doing a project based on VLSI.Since am new to this field ,i would like to have some help as to which are the projects that i should try .anyhelp would be appreciated. thanks #Entirely new to this field
  9. A

    Bipolar process(MicroElectronics)

    thanks buddy.actually am a CSE student but interested in learning VLSI.i got no idea as whether to learn chip designing or chip programming. could u please suggest me ?
  10. A

    Bipolar process(MicroElectronics)

    Hello everyone, why does bipolar process operate at high frequencies? thank you

Part and Inventory Search

Back
Top