typical high impedance values
In a high impedance state the value would generally be undetermined.
Example: If you are using a CMOS inverter and both the NMOS and PMOS are off, then the output can be anywhere from Vdd to Vss.
If you were to connect a pull up and pull down resistor (of equal value) at the output then it will be half Vdd-Vss.
In high impedance in your I/O port, it probably disabling the path completely so it does not interfere with the signal. Example: switch off your transmission gate so that no signal flows.