Zhane
Member level 5
xst:2677
argh... I'm getting alot of the following error when i tried to do synthesis
:Xst:2677 - Node <myRAM/Mram_mem1> of sequential type is unconnected in block <encoder>.
I got this error from myRam and many others... some kind people please helpme..
xxx is myRAM/Mram_mem1-128 of my memory and yyy is my encoder
argh... I'm getting alot of the following error when i tried to do synthesis
:Xst:2677 - Node <myRAM/Mram_mem1> of sequential type is unconnected in block <encoder>.
I got this error from myRam and many others... some kind people please helpme..
xxx is myRAM/Mram_mem1-128 of my memory and yyy is my encoder
module encoder(clk,rst);
parameter word_size = 128;
parameter addr_size = 5;
input clk;
input rst;
//
wire [addr_size -1:0] address;
wire [word_size -1:0] busRiscMem, busDctMem;
wire enDCT, wrRAM;
wire dctdone;
RAM myRAM(busRiscMem,address,busDctMem, wrRAM, clk);
DCT myDCT(busDctMem,dctdone,busRiscMem,enDCT,clk);
RISC_SPM myRISC(cmpError,enDCT,wrRAM,address,busRiscMem,dctdone,clk,rst);
endmodule
module RAM(data_out, address, data_in, write, clk);
parameter word_size = 128;
parameter memory_size = 32; // by right is 24, but since 2^5 = 32
parameter addr_size = 5;
output[word_size-1 : 0] data_out;
input [word_size-1 : 0] data_in;
input [addr_size-1 : 0] address;
input write, clk;
reg [word_size -1:0] mem [memory_size-1:0];
assign data_out = mem[address];
always @(posedge clk) begin
if (write)
mem[address] <= data_in;
end
endmodule