Xilinx XC3S200PQ208 Demo board

gold_kiss · May 27, 2005

Hi All,
I am developing a XC3SPQ208 Demo board. I have following questions on the same.

1. Should the demo board be in 4 layered? or 2 layer would do.
2. I am using XCF01SVO20 Flash. Is this alright? I mean does the flash match the required basic criteria.
3. M0, M1, and M2 pins of FPGA should be connected in what fashion.
4. Can all IO's banks support 3.3V?
5. Does any IO have special care to be taken?
6. 1.2V, 2.5V and 3.3V for VCCINT, VCCAUX, VCCO is the supply given to all pins respectively. In which case all IO's are 3.3V?
7. Wht is the value of Bypass cap and decoupling cap? Wht all care should be taken while designing the board? Do I need to place the caps near the power ground pin? or is it I need to place it near the regulator?
8. Any references for board design will be highly appreciated.

Thanks,
Gold_kiss

revolt · May 27, 2005

Hi,

goto to the Xilinx hp:
https://www.xilinx.com/products/spartan3/s3boards.htm
The user guide for the Xilinx Starter Kit contains the complete schematic of the board. The layout can be downloaded as Gerber files.

gold_kiss · May 27, 2005

I basically want to design the board on by myself. I am also using the schematic there on for reference.

Please answer the questions placed in my earlier mail.

mystery · May 28, 2005

gold_kiss said:
Hi All,
I am developing a XC3SPQ208 Demo board. I have following questions on the same.

1. Should the demo board be in 4 layered? or 2 layer would do.
2. I am using XCF01SVO20 Flash. Is this alright? I mean does the flash match the required basic criteria.
3. M0, M1, and M2 pins of FPGA should be connected in what fashion.
4. Can all IO's banks support 3.3V?
5. Does any IO have special care to be taken?
6. 1.2V, 2.5V and 3.3V for VCCINT, VCCAUX, VCCO is the supply given to all pins respectively. In which case all IO's are 3.3V?
7. Wht is the value of Bypass cap and decoupling cap? Wht all care should be taken while designing the board? Do I need to place the caps near the power ground pin? or is it I need to place it near the regulator?
8. Any references for board design will be highly appreciated.

Thanks,
Gold_kiss

1- If you are not using it in high speed (<20 Mhz) , then two layer board is fine
2- XCF01SVO20 is enough for the basic requirement , but if you use microblaze then you may need to put the program memory to the same flash , in this case it should be at least XCF02SVO20
3- Basically you can connect them to the gnd, but i advise you to do through the jumpers
4- All IO banks support 3.3V
5- It depends to your requirements, for more info look at the datasheet
6- VCCint should be 1.2V VCCaux should be 2.5V , and for to have all IOs to be 3.3V , then connect all VCCo pins to the 3.3V
7- 100 nf value is good for the decoupling cap, you may place caps to both power pins and requlators
8- for reference design look at the xilinx website

Xilinx XC3S200PQ208 Demo board

gold_kiss

Full Member level 4

revolt

Full Member level 2

gold_kiss

Full Member level 4

mystery

Full Member level 2

Similar threads

Xilinx XC3S200PQ208 Demo board

gold_kiss

Full Member level 4

revolt

Full Member level 2

gold_kiss

Full Member level 4

mystery

Full Member level 2

Similar threads

Privacy & Transparency

Privacy & Transparency