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xilinx VII PRO and cPCI design

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Bartart

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Hello!

Does anyone out there has some experience with connecting Virtex II Pro to cPCI bus. If any can help me with some design tips or advice. I have to make a 5 V compatible PCI design and as i found out the only way to do this is using 0 delay switchs from IDT (xapp646).

Thanks, Bart
 

System.out

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The download above seems to be the VirtexII manual.

Reference to the application note: **broken link removed**
 

sp3_kapil

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The download above seems to be the VirtexII manual.

Reference to the application note: **broken link removed**
 

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