x_ramb16
No, this is done automatically. However, I did got some issue with ISE 7.1, with STARTUP_SPARTAN3.
When simulating post P&R, the generated source file was missing GTS declaration. It only contained GSR, which was took from reset signal, but GTS was tied low in my design. However, the generated file did not assign anything to the UUT GTS wire. The simulation thus end-up having all outputs tri-stated (which obviusly doesn't match reality).
I had to write, in the testbench file:
assign uut.GTS = glbl.GTS; //Note that 'uut' is simply the name of the unit-under-test module instance declared in the testbench.
Or you could simply assign 0 to uut.GTS.