Hi ,
Xilinx specification says Spartan I/0 are 5V tolerant when LVTTL, LVCMOS2 and PCI33_5 are selected. I would like to know how to select these standards. Do we have a default standard setting for a xilinx device ? If so how can we differentiate the I/0 which are 5V tolerant and which are not 5V tolerant.
> I would like to know how to select these standards.
These standards can be either selected using the Timing Constraints Editor or the IO buffer for the required standard can be directly instantiated.
>Do we have a default standard setting for a xilinx device ?
For spartan2, default is LVTTL
>If so how can we differentiate the I/0 which are 5V tolerant and which are not 5V tolerant.
Go thro' Datasheet
Hi,
I have an additional question which to the one of auromira:
What's the upper output voltage level (VOH) when LVTTL or LVCMOS is used? The reason I asiking is that I want to connect some flash to the FPGA and the flash I want to use is not 5V tolerant on its inputs :roll:
Of course there is an 5V equivalent type available, but this requires much more power
In the datasheet of the spartan II I found only the minimum VOH, but not the maximum level, so I would be very happy if anybody can help me about solving this problem.
Thanks in advance,
Maddin