Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Xilinx Spartan XC2S200Pq208

Status
Not open for further replies.

auromira

Junior Member level 2
Junior Member level 2
Joined
Dec 18, 2002
Messages
23
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,281
Visit site
Activity points
112
xc2s200pq208

Hi ,
Xilinx specification says Spartan I/0 are 5V tolerant when LVTTL, LVCMOS2 and PCI33_5 are selected. I would like to know how to select these standards. Do we have a default standard setting for a xilinx device ? If so how can we differentiate the I/0 which are 5V tolerant and which are not 5V tolerant.


Somebody!!!!
Help me........ please.

Best regards,
:lol:
 

Hello!

You can select IO staandard in constraint file editor,or you can implement standard directli in ucf file.

See the xilinx constraint guide.


good luck Bart
 

RE

Thanks for your reply It solved my problem :D

Can I assign different I/o standards for different signals in my constrain editor will it create a problem


Regards,
:D
 

You can't assign different standard for a pin... obviously...

however, you can select :
- current (speed) per pin
- voltage per bank of pins (4 banks in this spartan, I think...)
 

please notice the usage of pin Vref!Use it to support some voltage standard.
 

> I would like to know how to select these standards.
These standards can be either selected using the Timing Constraints Editor or the IO buffer for the required standard can be directly instantiated.

>Do we have a default standard setting for a xilinx device ?
For spartan2, default is LVTTL

>If so how can we differentiate the I/0 which are 5V tolerant and which are not 5V tolerant.
Go thro' Datasheet
 

Hi,
I have an additional question which to the one of auromira:
What's the upper output voltage level (VOH) when LVTTL or LVCMOS is used? The reason I asiking is that I want to connect some flash to the FPGA and the flash I want to use is not 5V tolerant on its inputs :roll:
Of course there is an 5V equivalent type available, but this requires much more power :(
In the datasheet of the spartan II I found only the minimum VOH, but not the maximum level, so I would be very happy if anybody can help me about solving this problem.
Thanks in advance,
Maddin
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top