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xilinx spartan-6 now supports AXI4-bus ?

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buenos

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Hi

I recently found on the Xilinx website taht the Spartan-6 PCI-express endpoint has two datasheets (a year ago there was one) one original and one with AXI4 bus interconnect option.

How do they distinguish? Is it that the new silicon revision is equipped with the AXI4 interface on the hard IPs, or something to do with new version of CoreGenerator (making wrappers with the new interface)?
 

mrflibble

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As far as I can tell it has nothing to do with silicon revisions, and everything to do with the newer tool versions. Looks like xilinx is moving towards more use of the AXI4 bus.
 

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