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Xilinx FFT core generator - simulation results issue

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Newbie level 5
Jan 29, 2012
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I'm facing the problem of simulating an FFT core generator in vhdl.

I have written a FSM and a test bench file to run the simulation of the Xilinx FFT core (Streaming) in ISE.
I'm using a DDS module (from the core generator also) that generates a sinusoid at the input of the fft.

What I'm getting at the output is something weird.
Each aquisition gives two deltas at the output, but they are in the wrong position, and tend to change a little bit even if the signal at the input is always exactly the same.
Needless to say that the Nyquist frequency should be respected. In fact the input is represented with 1024 samples in which there are 8 periods of a sinusoid, thus the delta should appear in 8th/9th bin of the forurier transform (and another one at 1024-9 because it is bilateral, correct?) but what I get are two deltas, the first one at bin 162 and the second one at bin 237.
Even if I'm getting two deltas (which I guess is quite a great success), I think the problem is rooted deeper and it's not just a metter of conventions or aliasing, even if it seems so.

As I sayd I'm using the streaming model of the fft core. I think I am respecting each constraint on the input signals to be given (my waveforms are quite the same as the ones on the xilinx datasheet of the component).
Since it's a streaming model I'm actually giving continously the same input (the same sinusoid) while picking up at the output when data is ready.

Probably there is something that I'm missing.

Do you have any guess about this problem?
Thanks and best regards.

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