Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

xilinx CPLD's JTAG voltage in Mixed Mode

Status
Not open for further replies.

yaser123

Member level 1
Joined
Jan 9, 2003
Messages
34
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Location
qaemshahr
Activity points
184
jtag voltage

hi friends
i use xilinx CPLD XC95216 .i want to utilize it as it's mixed mode which VCC_IO should be connect to 3.3 and VCC_INT to 5 volt.
how about JTAG pins ? should be connected to 3.3 v or 5 v ?...why ?
tnx
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top