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Xilinx CPLD XC2C256 PULLUP

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priestnot

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Hello...
I am tring to configure the IO pins of the XC2C256 with internal pull-up. So edited my UCF file from:

Code:
NET	"A7"	LOC =	"39";
NET	"A8"	LOC =	"40";
to
Code:
NET	"A7"	LOC =	"39" | PULLUP;
NET	"A8"	LOC =	"40" | PULLUP;

And in ISE i get this warning:
Code:
WARNING:Cpld - PULLUP specified for net 'A8' conflicts with previous KEEPER
WARNING:Cpld - PULLUP specified for net 'A7' conflicts with previous KEEPER

In This Xilinx website AR #14318 - 8.1i CPLD CoolRunner-II - "Warning:CPLD:960: or Warning:CPLD:962 - PULLUP conflicts with previous KEEPER specification"/ CoolRunner-II termination methods they say to define the pull-up like this:

Code:
net name pull-up;
But that way i cannot define the pin that the net is connected...
Any ideas hoe to define a pin with internal pull-up or pull-down?
 

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