Hi,
Just to finish off this thread, the below schematic is the final adjustable on- and off-delay latch circuit. In a sense, a bit of a glorified 555 in some ways...
I had to admit defeat of only using BJTs, resistors, capacitors and diodes because the ~600 mV base turn on voltage of the BJTs that were replaced by the comparators gave little timing flexibility and limitingly short on- and off-delays, and resetting the RC capacitor proved very hard to obtain an adequate signal for the draining NPNs.
The BJT-only version was time-limited, messy and imperfect. The comparator (+ NOT gate) version can be configured from milliseconds to hundreds of seconds of on- and off-delay, has neat signals and while no doubt not perfect by a long shot, functions correctly.
Circuit operation:
Top latch is latched by a brief high-going pulse (ON) in order to charge the on-delay RC and be released/turn off when the top comparator senses 2/3 Vcc, at that moment the right-hand latch latches on and powers the load.
Bottom latch is the same as the ON latch - it is latched by a brief high-going pulse (OFF) in order to charge the off-delay RC and be released when the bottom comparator senses, yet again, 2/3 Vcc. At that moment, the load latch is turned off by a low-going pulse to the left-hand PNP, which sends a high pulse to the base of the right-hand PNP, turning the load latch off.
The respective capacitor-draining NPNs are to speed up the re-triggering of either delay section and prevent the signals overlapping with long charging times.
If I remove the charging capacitors, the simulation goes very slowly at the ON moment - usually a bad sign of comparator chattering or similar undesired events. I originally monitored about 18 different signals, comparator outputs included, so will look into that at next opportunity I have. Maybe it needs a minimum RC with a tiny capacitor, e.g. 10 nF, so the comparator inputs don't rise too quickly, who knows, keen to see reason for simulation slowdown as other signals looked correct and without chatter.
Hopefully, the rest if how it functions is even more evident.
I know it's a bit silly, but I just wanted to put together an on- and off-delay latching circuit using my own mind and not just copying something already done.