Muthamil, the structure you are having is the simplest one. Once if you want to introduce (totally brand new element) to your library you have to take in consider 3 problems.
1st : The cell's specification (here is the decoder) must be added to your Verilog Lib or VHDL Package.
2nd : The cell functioning, pin direction as well as its parasitics characteristic as well as the match in timming and power model as you have in your current working library. This is the most complicated,difficult step, if you have a team work it will be easier for you ( elseif you are alone -like me) you have to go thru either HDL-A or HDL-AMS or Spice and Nt_shell and NanoSim to build your cell and do power and timming analysis.
3rd : You have to add the cell's shape in your symbolic library also.
If you have to build your own cell, these are the detailed steps that i know. Otherwise just simply build the decoder by Logic Gates ..... Anyway all the best..