Actually, what you describe is a sequencer, not a counter, where the sequence is determined by the input vector. Below you will find some code that might help you to do what you need. You can also try to add another state, so that if input = "00000000", the FSM goes to an invalid state. Check the syntax, since I don't have an available compiler in my PC at this moment.
You will need to complete code for state 12,3,4,5,6 and 7.
library IEEE;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;
entity count_at_input is
port(
clk : in std_logic; --Clock
rst : in std_logic; --asynchronous reset
seq : in std_logic_vector(7 downto 0); --sequence
Q : out std_logic_vector(2 downto 0) --output (count)
);
end count_at_input;
architecture counter of count_at_input is
signal Qp, Qn : std_logic_vector(2 downto 0); --Present and Next state
begin
combinational : process(seq,Qp)
begin
case Qp is
when "000" => --If reached, Bit 0 is 1
if(seq(1) = '1') then --If bit1=1, then next count = 1
Qn <= "001";
elsif(seq(2)='1') then --else if bit2=1, then next count =2
Qn<="010";
elsif(seq(3)='1') then --else if bit3=1, next count =3
Qn<="011";
elsif(seq(4)='1') then --else if bit4=1, next count=4
Qn<="100";
elsif(seq(5)='1') then --else if bit5=1, next count =5
Qn<="101";
elsif(seq(6)='1') then --else if bit6=1, next count =6
Qn<="110";
elsif(seq(7)='1') then --else if bit7=1, next count =7
Qn<="111";
else --if all other bits are 0, stay here
Qn<="000"; --or it could be Qn<=Qp;
end if;
when "001" => --If reached, bit 1=1
if(seq(2)='1') then --else if bit2=1, then next count =2
Qn<="010";
elsif(seq(3)='1') then --else if bit3=1, next count =3
Qn<="011";
elsif(seq(4)='1') then --else if bit4=1, next count=4
Qn<="100";
elsif(seq(5)='1') then --else if bit5=1, next count =5
Qn<="101";
elsif(seq(6)='1') then --else if bit6=1, next count =6
Qn<="110";
elsif(seq(7)='1') then --else if bit7=1, next count =7
Qn<="111";
if(seq(0) = '1') then --If bit0=1, then next count = 0
Qn <= "000";
else --No other bits are set
Qn<="001"; --or it could be Qn<=Qp;
end if;
when "010" => --Put similar code here
when "011" => --Put similar code here
when "100" => --Put similar code here
when "101" => --Put similar code here
when "110" => --Put similar code here
when others => --Put similar code for state 7
end case;
Q<=Qp; --Output is the present state (count)
end process combinational;
sequential : process(CLK,RST,seq)
begin
if(RST='1') then
if(seq(0)='1') then
Qp<="000";
elsif(seq(1)='1') then
Qp<="001";
elsif(seq(2)='1')then
Qp<="010";
elsif(seq(3)='1') then
Qp<="011";
elsif(seq(4)='1')then
Qp<="100";
elsif(seq(5)='1') then
Qp<="101";
elsif(seq(6)='1')then
Qp<="110";
elsif(seq(7)='1')then
Qp<="111";
else --If no bit on input is set
Qp<="000"; --default to count=0
end if;
elsif(clk'event and clk='1') then
Qp <= Qn; --On rising edge, change stage
end if;
end process sequential;
end counter;