Wired ORed and Wired ANDed

[Ericwatson]

What kind of logic chips are wired ORed and Wired ANDed internally. Any Advantage of using IC chips wired ORed or Wired ANDed. Instead of using Tri-state buffer the designer would wire the outputs of logic chips either OR'ed or AND'ed.

 

[andre_luis]

This would be an interesting question to ask in the ASIC section of the forum, due it is related to library-cell design, but as far as I can see, there is no apparent reason to prevent make the bolean logic with passive components.

 

[ads-ee]

interrupts are a good example of internal/external wired-OR/AND logic and they are typically implemented with open-collector/open-drain output drivers. All the outputs are tied together and a pullup is used to obtain a high level. If any driver is actively driving the signal (low) the output goes low (like a multi-input AND gate).

I don't think this is common practice to do inside an IC as it's more efficient to use a gate to AND those interrupts.