Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Wired ORed and Wired ANDed

Status
Not open for further replies.

Ericwatson

Banned
Joined
May 15, 2015
Messages
26
Helped
0
Reputation
0
Reaction score
0
Trophy points
1
Activity points
0
What kind of logic chips are wired ORed and Wired ANDed internally. Any Advantage of using IC chips wired ORed or Wired ANDed. Instead of using Tri-state buffer the designer would wire the outputs of logic chips either OR'ed or AND'ed.
 

andre_teprom

Super Moderator
Staff member
Joined
Nov 7, 2006
Messages
9,240
Helped
1,151
Reputation
2,321
Reaction score
1,127
Trophy points
1,403
Location
Brazil
Activity points
53,784
This would be an interesting question to ask in the ASIC section of the forum, due it is related to library-cell design, but as far as I can see, there is no apparent reason to prevent make the bolean logic with passive components.
 

ads-ee

Super Moderator
Staff member
Joined
Sep 10, 2013
Messages
7,807
Helped
1,810
Reputation
3,630
Reaction score
1,769
Trophy points
1,393
Location
USA
Activity points
58,934
interrupts are a good example of internal/external wired-OR/AND logic and they are typically implemented with open-collector/open-drain output drivers. All the outputs are tied together and a pullup is used to obtain a high level. If any driver is actively driving the signal (low) the output goes low (like a multi-input AND gate).

I don't think this is common practice to do inside an IC as it's more efficient to use a gate to AND those interrupts.
 

Status
Not open for further replies.

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Top