Wire_load_model in different levels of hierarchy

[alexhugo]

Hi,
I have few RTL codes (module A,B,C and D) instantiated in a top level module (TOP). TOP instantiates A, B, C and D and has also some glue logic. Size of A, B and C are between 25K to 50 K.
TOP (A+B+C+D+GLUE logic) is about 200K.


Which of the followings I should do?

Should I do this:
set current_design TOP
set_wire_load_model -name "TSMC_200K_MODEL"

Or this:

set current_design A
set_wire_load_model -name "TSMC_25K_TO_50K_MODEL"
set current_design B
set_wire_load_model -name "TSMC_25K_TO_50K_MODEL"
set current_design C
set_wire_load_model -name "TSMC_25K_TO_50K_MODEL"
set current_design D
set_wire_load_model -name "TSMC_25K_TO_50K_MODEL"
set current_design TOP
set_wire_load_model -name "TSMC_200K_MODEL"

I don't know know if this is going to help but my library is tcbn45gsbwpwc.
Thanks in advance for the help
Alex

 

[birdy123]

second method is best because it has all the information of the all the hierarchy.

 

[my2817]

you need refer to wire_load_mode （not model ）