why we use 1:1, 2:1, 4:1 and 8:1 devices for BJT matching?

[gksivas]

1)why we use this type of pattern ( SQUARE SHAPE) for BJT matching , but not for CMOS? what is the difference between BJT and MOS matching?

2)can we use 24:1 for BJT. which is better 8:1 or 24:1? why?

3)If there are two devices 2:3, 2:4 or 3:4. how can we match them ( i mean in which pattern, is one dimension or two dimension). can we use dummies to fill places?

example: can we use for 6:1 (M2:M1) like below


M2 M2 M2
D M1 D
M2 M2 M2

Here D means dummies. can we fill the places to get Square structure with dummies?

please clarify doubts friends

 

[zhongdg]

Re: why we use 1:1, 2:1, 4:1 and 8:1 devices for BJT matchin

1)why we use this type of pattern ( SQUARE SHAPE) for BJT matching , but not for CMOS? what is the difference between BJT and MOS matching?

Re:In order to keep the centor BJT math. CMOS can also use this type. But it's difficult to route.

2)can we use 24:1 for BJT. which is better 8:1 or 24:1? why?

Re: 24:1 for BJT can be used. But it's better to use 8:1 for better matching.

3)If there are two devices 2:3, 2:4 or 3:4. how can we match them ( i mean in which pattern, is one dimension or two dimension). can we use dummies to fill places?


Re: You can use dummy for better matching.


example: can we use for 6:1 (M2:M1) like below

 

[layoutmaster]

1) Usually with MOS you can get structures much more compact and, as a direct consequence, better matched. In other words, it's easier or less time consuming the creation of a good enough matching MOS structure but BJTs will require more space and sometimes if more difficult to get a well matched structure, that's why it's used to get that sqare patterns for them. Anyway, that does not means that square patterns are not used for MOS as you mentioned, THEY ARE.

2) I agree with teh previous post, an 8:1 is better than a 24:1, again becuase it will be much compact.

3) THe idea in this case would be to distribute as symetric as possible the active devices and then add dummies in the rest of the spaces. In my opinion it's better to make it in two rows...

 

[jecyhale]

Re: why we use 1:1, 2:1, 4:1 and 8:1 devices for BJT matchin

The best is 8:1, because it can be arranged as 3 rows and 3 colums.
This is the best arrangement for matching.

 

[elbadry]

Re: why we use 1:1, 2:1, 4:1 and 8:1 devices for BJT matchin

In terms of symmetry, both 8:1 and 24: 1 are similar

8:1 --> 3 rows by 3 columns
24:1 --> 5 rows by 5 columns

The question should not be which is better. These values are usually dictated by the design. If you have the option to choose, then 1 to 8 will be better basically due to much easier routing

 

[rfsystem]

Re: why we use 1:1, 2:1, 4:1 and 8:1 devices for BJT matchin

Why 24:1 should have a better matching than 8:1. That confuse me. I'm thinking that 24:3 better match than 8:1.

The ratio is design dependent. In bandgaps it makes sense to increase the ratio to improve the overall spread. But current density ratio increases in the same manner so driving current ratios is more appropriate.

Form the process data of 0.35u SiGeBiCMOS I found no special gradient within 100um. Only orientation should be equal.

If there a surrounding effects the magic Tic-Tac-To arrangement is a drawback because the center cell is 4-sided surrounded by NWELL, the others only 2 to 3-sided.

 

[NightHawk_099]

Re: why we use 1:1, 2:1, 4:1 and 8:1 devices for BJT matchin

I would say that the diference between CMOS matching and BJT matchins is dependent on two things:

Size of tech: It will determine if your biggest worry are gradients, boundary contitions(that the BJT's or CMOS see the same sorroundings ) or both.

BJTs are MUCH more suceptible than CMOS to noise carried over metal lines, so you want to keep that in mind when routing, and location of terminals in CMOS is diferent than BJTs. Also, CMOSs are much smaller, so are much less suceptable to gradients, and in submicron, much more suceptible to boundary conditions and densitys.

So, if your biggest worry is gradients, a big array helps match them against graidents. If your biggest worry is boundary conditions, a small array is easier to match.

Also, used area is an important concern.. BJTs arrays are big and area hungy, and if you have lots of them, they might use the same area as the rest of your bias cmoses. That is a lot.
Just my 2 cents.

 

[moriar]

Routing will matter too, for example in the case of current mirrors or current sources. Common centroid type structures tend to help here.