Re: Timing closure doubt
If the tapeout is next day, then only an in place optimization, an ECO should be tried for setup voilations. This means the tool will preserve all the routing and makes minimal changes to the netlist (for example only adds buffers, not logic restructure ..etc). If this fails then the chip could stiil be taped out but should be run at lower frequencies.
Hold times are easier to correct and also critical (because the chip will not work at any frequency if there is a hold voilation), so they should be fixed without question.