Double Inverter Gate sees several applications:
1. To drive a high capacitive load. CMOS inverter found in digital logics uses minimum sized transistor, thus not capable of driving such load. It will take a long time to charge such a load or discharge a load using a minimum sized transistor (which can suffer from punch-through). One way is to use multiple buffer chain or cascaded inverters. Double inverter is one such example. The second and subsequent inverters are designed to have larger transistors carefully scaled such that the low-high transition time or high-low transition time is fast (fast gate propagation delay). This also reduces duration of short-circuit current when CMOS inverter switches and also gives a steeper edge.
2. Domino logic uses an inverter in dynamic CMOS logic. This inverter is a latch preserve the previous logic value. If the prior logic is an inverter used in Domino logic, than this can be referred to as double inverter.
3. In random logics where 74-series ICs are used. Double inverter gates are used to increase the fan-out of a driver, which can be TTL, ECL, Open-collector, Open-drain etc. Usually bus drivers might need to drive more than one signal lines and double inverter is used to increase fan-out while preserving the same logic value by double inverting.