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why the frequency response takem -3db down in Cmos analog circuit?

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dsp15

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why the frequency response taken -3db down in Cmos analog circuit?

why the frequency response taken -3db down in CMOS analog circuit?

- - - Updated - - -

thanks in advance
 

Hi dsp15,
3 dB is usually meant as Half power.
And it is nothing but 20 Log (0.707) or 10 Log (0.5).

Regards,
Shunmuga Sundaram
 

It's a generally-agreed-upon convention; "-3dB bandwidth"
is what people say when they feel a need to be clear about
the basis.

If you pick some other reference point, you gots to 'splain it
over and over.
 

For a first order circuit the -3dB point is the so-called pole frequency and gives a phase shift of -45 deg.
For a second-order lowpass circuit, the phase shift at the pole frequency is -90 deg.

Hence, it makes sense to use the pole frequency for describing first and second order circuits.
 

...And, in addition, is the frequency at which asymptotes cut in Bode plots (cutoff frequency or corner frequency).
The term "cutoff" can be a bit misleading for some people, thinking erroneously that something abrupt happens at that frequency. Something rather abrupt happens at the "cutoff frequency" of waveguides, but it's the same term used for something totally different.

Z
 

The term "cutoff" can be a bit misleading for some people, thinking erroneously that something abrupt happens at that frequency.
Z
Yes - similarly, there are some people thinking erroneously that the amplitude approaches "infinity" at the pole frequency.
 

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