Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

why source is at zero potential?

Status
Not open for further replies.

sachinmaheshwari

Member level 4
Joined
Aug 7, 2007
Messages
69
Helped
0
Reputation
0
Reaction score
0
Trophy points
1,286
Activity points
1,743
previously in mos the source is use to be at -Vss supply.
n now its is at gnd why?
 

it is just the difference in potential that matters.... the voltages are just relative to a particular value assumed as ground that is all... they are not absolute....
 
Hi,

Years ago when application used dual supplies (+VDD and -VSS) the VSS point used to be the negative value of VDD( like -5V, -3.3V etc). If an application had an VDD of +5V then it used to have an -VSS of -5V. SO the operating voltage range used to be 10V. Even now some applications use dual supplies. But having two supplies is cumbersome in present day applications where operating voltage range is (1.2V, 1.0V etc) and hence VSS is taken as 0.
 

It depends on the application. Usually, it used in analog applications like amplifiers where you need a positive and negative voltage swing. But in digital, you only have 1 or 0 or "+" and GND.
 

What I know is that a dual power supply was used a while ago, but since the supplies are usually not dual, and they are single, a converter is needed. Thus it was decided to use 0 and 3 instead of -1.5 and 1.5.
 

Hi, earlier when there was only Nmos, which had one drain and source. So the drain of Nmos was connected to Vdd and the souce of the Nmos was connected to Vss, to ease ppl in remembering the convention. drain to Vdd and source to Vss.
With Cmos that has both pmos and nmos the same convention followed but now with the source of Pmos connected to Vdd and the source of Nmos to Vss. Every1 preferred using the same convention that was used with Nmos tech before
 

Status
Not open for further replies.

Similar threads

Part and Inventory Search

Welcome to EDABoard.com

Sponsor

Back
Top