when i read snug Asynchronous & Synchronous Reset
Design Techniques - Part Deux,i don't unserstand the following words:
The biggest problem with asynchronous resets is that they are asynchronous, both at the
assertion and at the de-assertion of the reset. The assertion is a non issue, the de-assertion is the
issue.
We have setup and hold time requirements for synchronous inputs. Like wise for asynchronous inputs we have recovery and removal time requirements. Recovery time is the minimum amount of time for which the asynchronous i/p of a flip flop has to be stable before the active edge of the clock. Removal time is the minimum amount of time for which the asynchronous i/p of a flip flop has to be stable after the active edge of the clock.
If we take any design, the Reset signal is synchronized. Assertion of Reset is asynchronous but de-assertion is always synchronous and has to comply with the recovery and removal times of the synchronizing flip-flop.
Means asynchronous reset can be asserted at any time. but ensure that the de-assertion of the reset can occur within one clock period. if the release of the reset occurred on or near a clock edge such that the flip-flops went metastable state.
OK, you have this doubt because you think there are some issues in asserting reset signal asynchronously ? If so, tell us about it and we can make some comments on it.
So assertions need not follow recovery/removal? what is the internal structure of the flops that makes only de-assertions a possible failure-causing event and not assertions?